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參數(shù)資料
| 型號： | MT28F160S3 |
| 廠商： | Micron Technology, Inc. |
| 英文描述： | 2 Meg x 8/1 Meg x 16 Smart 3 Flash(2 M x 8/1 M x 16閃速存儲器) |
| 中文描述： | 2梅格× 8 /檢測起× 16智能3閃光（2 M中的x 8月1日M中的x 16閃速存儲器） |
| 文件頁數(shù)： | 27/39頁 |
| 文件大?。?/td> | 281K |
| 代理商： | MT28F160S3 |
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27
2 Meg x 8 /1 Meg x 16 Even-Sectored Flash Memory
MT28F160S3_2 – Rev. 8/00
Micron Technology, Inc., reserves the right to change products or specifications without notice.
2000, Micron Technology, Inc.
2 MEG x 8/1 MEG x 16
SMART 3 EVEN-SECTORED FLASH
PRELIMINARY
Write 60h
Start
Read Status Register
Write D0h
SR7 =
Full Status Check
if Desired
SR5 =
CLEAR BLOCK LOCK BITS
Complete
SR1 =
SR3 =
Read Status Register Data
(see above)
Voltage Range Error
Device Protect Error
CLEAR BLOCK LOCK
BITS Error
0
0
0
0
1
1
1
SR4, SR5 =
Command Sequence
Error
1
0
CLEAR BLOCK LOCK BITS
Complete
FULL STATUS CHECK PROCEDURE
1
Figure 9
CLEAR BLOCK LOCK BITS Flow chart
BUS
OPERATION COMMAND
WRITE
COMMENTS
CLEAR BLOCK Data = 60h
LOCK BITS
SETUP
CLEAR BLOCK Data = D0h
LOCK BITS
CONFIRM
Addr = X
WRITE
Addr = X
READ
STANDBY
Status Register Data
Check SR7
1 = ISM Ready
0 = ISM Busy
Write FFh after the CLEAR BLOCK LOCK BITS
operation to place device in read array mode.
BUS
OPERATION COMMAND COMMENTS
STANDBY
Check SR3
1 = Programming Voltage
Error Detect
Check SR1
1 = Device Protect Detect
WP# = V
IL
Check SR4, SR5
Both 1 = Command
Sequence Error
Check SR5
1 = Clear Block Lock Bits
Error
STANDBY
STANDBY
STANDBY
SR5, SR4, SR3, and SR1 are only cleared by the
CLEAR STATUS REGISTER command. If an error is
detected, clear the status register before attempt-
ing retry or other error recovery.
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