參數(shù)資料
型號(hào): MSC8103M1200F
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 數(shù)字信號(hào)處理
英文描述: 64-BIT, 75 MHz, OTHER DSP, PBGA332
封裝: 17 X 17 MM, FLIP-CHIP, PLASTIC, BGA-332
文件頁數(shù): 69/104頁
文件大小: 1810K
代理商: MSC8103M1200F
MSC8103 Network Digital Signal Processor, Rev. 11
Freescale Semiconductor
3-1
Packaging
3
This chapter provides information about the MSC8103 package, including diagrams of the package pinouts and
tables showing how the signals discussed in Chapter 1 are allocated. The MSC8103 is available in a 332-pin
lidded flip chip-plastic ball grid array (FC-PBGA).
3.1 FC-PBGA Package Description
Figure 3-1 and Figure 3-2 show top and bottom views of the FC-PBGA package, including pinouts. Table 3-1 lists
the MSC8103 signals alphabetically by signal name. Connections with multiple names are listed individually by
each name. Signals with programmable polarity are shown both as signals which are asserted low (default) and
high (that is, NAME/NAME). Table 3-2 lists the signals numerically by pin number. Each pin number is listed once
with the various signals that are multiplexed to it. For simplicity, signals with programmable polarity are shown in
this table only with their default name (asserted low).
Note:
The package description in this chapter applies to packages with lead-bearing and lead-free spheres.
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