參數(shù)資料
型號: MQ80C154-16P883
廠商: TEMIC SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: 8-BIT, 16 MHz, MICROCONTROLLER, CQFP44
文件頁數(shù): 131/142頁
文件大?。?/td> 61013K
代理商: MQ80C154-16P883
216
ATmega165A/PA/325A/PA/3250A/PA/645A/P/6450A/P [DATASHEET]
8285E–AVR–02/2013
25.3
Data Registers
The Data Registers relevant for Boundary-scan operations are:
Bypass Register
Device Identification Register
Reset Register
Boundary-scan Chain
25.3.1
Bypass Register
The Bypass Register consists of a single Shift Register stage. When the Bypass Register is selected as path
between TDI and TDO, the register is reset to 0 when leaving the Capture-DR controller state. The Bypass Regis-
ter can be used to shorten the scan chain on a system when the other devices are to be tested.
25.3.2
Device Identification Register
Figure 25-1 shows the structure of the Device Identification Register.
Figure 25-1. The Format of the Device Identification Register
25.3.2.1
Version
Version is a 4-bit number identifying the revision of the component. The JTAG version number follows the revision
of the device. Revision A is 0x0, revision B is 0x1 and so on.
25.3.2.2
Part Number
The part number is a 16-bit code identifying the component. The JTAG Part Number for the Atmel
ATmega165A/165PA/325A/325PA/3250A/3250PA/645A/645P/6450A/6450P is listed in Table 27-6 on page 260.
25.3.2.3
Manufacturer ID
The Manufacturer ID is a 11-bit code identifying the manufacturer. The JTAG manufacturer ID for Atmel is 0x1F.
25.3.3
Reset Register
The Reset Register is a test Data Register used to reset the part. Since the AVR tri-states Port Pins when reset,
the Reset Register can also replace the function of the unimplemented optional JTAG instruction HIGHZ.
A high value in the Reset Register corresponds to pulling the external Reset low. The part is reset as long as there
is a high value present in the Reset Register. Depending on the fuse settings for the clock options, the part will
remain reset for a reset time-out period (refer to ”Clock Sources” on page 28) after releasing the Reset Register.
The output from this Data Register is not latched, so the reset will take place immediately, as shown in Figure 25-2
MSB
LSB
Bit
31
28
27
12
11
1
0
Device ID
Version
Part Number
Manufacturer ID
1
4 bits
16 bits
11 bits
1-bit
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