參數(shù)資料
型號(hào)： MQ80C154-16P883
廠商： TEMIC SEMICONDUCTORS
元件分類： 微控制器/微處理器
英文描述： 8-BIT, 16 MHz, MICROCONTROLLER, CQFP44
文件頁數(shù)： 123/142頁
文件大?。?/td> 61013K
代理商： MQ80C154-16P883
209
ATmega165A/PA/325A/PA/3250A/PA/645A/P/6450A/P [DATASHEET]
8285E–AVR–02/2013
24. JTAG Interface and On-chip Debug System
24.1
Features
JTAG (IEEE std. 1149.1 Compliant) Interface
Boundary-scan Capabilities According to the IEEE std. 1149.1 (JTAG) Standard
Debugger Access to:
– All Internal Peripheral Units
– Internal and External RAM
– The Internal Register File
–Program Counter
– EEPROM and Flash Memories
Extensive On-chip Debug Support for Break Conditions, Including
– AVR Break Instruction
– Break on Change of Program Memory Flow
– Single Step Break
– Program Memory Break Points on Single Address or Address Range
– Data Memory Break Points on Single Address or Address Range
Programming of Flash, EEPROM, Fuses, and Lock Bits through the JTAG Interface
On-chip Debugging Supported by AVR Studio
24.2
Overview
The AVR IEEE std. 1149.1 compliant JTAG interface can be used for
Testing PCBs by using the JTAG Boundary-scan capability
Programming the non-volatile memories, Fuses and Lock bits
On-chip debugging
A brief description is given in the following sections. Detailed descriptions for Programming via the JTAG interface,
and using the Boundary-scan Chain can be found in the sections ”Programming via the JTAG Interface” on page
275 and ”IEEE 1149.1 (JTAG) Boundary-scan” on page 215, respectively. The On-chip Debug support is consid-
ered being private JTAG instructions, and distributed within ATMEL and to selected third party vendors only.
Figure 24-1 shows a block diagram of the JTAG interface and the On-chip Debug system. The TAP Controller is a
state machine controlled by the TCK and TMS signals. The TAP Controller selects either the JTAG Instruction
Register or one of several Data Registers as the scan chain (Shift Register) between the TDI – input and TDO –
output. The Instruction Register holds JTAG instructions controlling the behavior of a Data Register.
The ID-Register, Bypass Register, and the Boundary-scan Chain are the Data Registers used for board-level test-
ing. The JTAG Programming Interface (actually consisting of several physical and virtual Data Registers) is used
for serial programming via the JTAG interface. The Internal Scan Chain and Break Point Scan Chain are used for
On-chip debugging only.
相關(guān)PDF資料
PDF描述
MQ83C154XXX-L16/883D 8-BIT, MROM, 16 MHz, MICROCONTROLLER, CQFP44
MQ83C154CXXX-25/883R 8-BIT, MROM, 25 MHz, MICROCONTROLLER, CQFP44
MR80C154-L16/883R 8-BIT, 16 MHz, MICROCONTROLLER, CQCC44
MQ83C154CXXX-L16P883R 8-BIT, MROM, 16 MHz, MICROCONTROLLER, CQFP44
MR83C154CXXX-20P883R 8-BIT, MROM, 20 MHz, MICROCONTROLLER, CQCC44
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參數(shù)描述
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MQ80C154-25 制造商:TEMIC 制造商全稱:TEMIC Semiconductors 功能描述:CMOS 0 to 36 MHz Single Chip 8-bit Microcontroller
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MQ80C154-36 制造商:TEMIC 制造商全稱:TEMIC Semiconductors 功能描述:CMOS 0 to 36 MHz Single Chip 8-bit Microcontroller
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