參數(shù)資料
型號： MPC8240EC
廠商： Motorola, Inc.
英文描述： Integrated Processor Hardware Specifications
中文描述： 綜合處理器硬件規(guī)格
文件頁數(shù)： 5/52頁
文件大?。?/td> 1027K
代理商： MPC8240EC
MOTOROLA
MPC8240 Integrated Processor Hardware Specifications
For More Information On This Product,
Go to: www.freescale.com
5
General Parameters
1.3
General Parameters
The following list provides a summary of the general parameters of the MPC8240:
Technology
0.29-μm CMOS, five-layer metal
Die size
73 mm
2
Transistor count
3.1 million
Logic design
Fully-static
Packages
Surface mount 352 tape ball grid array (TBGA)
Core power supply
2.5 V ± 5% V DC (nominal; see Table 2 for recommended operating
conditions)
I/O power supply
3.0- to 3.6-V DC
1.4
Electrical and Thermal Characteristics
This section provides the AC and DC electrical specifications and thermal characteristics for the MPC8240.
1.4.1
DC Electrical Characteristics
The following sections describe the MPC8240 absolute maximum ratings, recommended operating
conditions, DC electrical specifications, output driver characteristics, and power data characteristics.
1.4.1.1
Absolute Maximum Ratings
The tables in this section describe the MPC8240 DC electrical characteristics. Table 1 provides the absolute
maximum ratings.
Table 1. Absolute Maximum Ratings
Characteristic
1
Symbol
Range
Unit
Supply voltage—CPU core and peripheral logic
V
DD
–0.3 to 2.75
V
Supply voltage—memory bus drivers
GV
DD
–0.3 to 3.6
V
Supply voltage—PCI and standard I/O buffers
OV
DD
–0.3 to 3.6
V
Supply voltage—PLLs and DLL
AV
DD
/AV
DD
2/LAV
DD
–0.3 to 2.75
V
Supply voltage—PCI reference
LVD
DD
–0.3 to 5.4
V
Input voltage
2
V
in
–0.3 to 3.6
V
Operational die-junction temperature range
T
j
0 to 105
°C
Storage temperature range
T
stg
–55 to 150
°C
Notes:
1. Functional and tested operating conditions are given in Table 2. Absolute maximum ratings are stress ratings only,
and functional operation at the maximums is not guaranteed. Stresses beyond those listed may affect device
reliability or cause permanent damage to the device.
2. PCI inputs with LV
DD
= 5 V ± 5% V DC may be correspondingly stressed at voltages exceeding LV
DD
+ 0.5 V DC.
F
Freescale Semiconductor, Inc.
n
.
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