參數(shù)資料
型號: MPC8240EC
廠商: Motorola, Inc.
英文描述: Integrated Processor Hardware Specifications
中文描述: 綜合處理器硬件規(guī)格
文件頁數(shù): 11/52頁
文件大?。?/td> 1027K
代理商: MPC8240EC
MOTOROLA
MPC8240 Integrated Processor Hardware Specifications
For More Information On This Product,
Go to: www.freescale.com
11
Electrical and Thermal Characteristics
1.4.1.5
Power Characteristics
Table 5 provides power consumption data for the MPC8240.
1.4.2
AC Electrical Characteristics
This section provides the AC electrical characteristics for the MPC8240. After fabrication, functional parts
are sorted by maximum processor core frequency as shown in Table 6 and tested for conformance to the AC
specifications for that frequency. The processor core frequency is determined by the bus (PCI_SYNC_IN)
Table 5. Preliminary Power Consumption
Mode
PCI Bus Clock/Memory Bus Clock
CPU Clock Frequency (MHz)
Unit
Notes
33/66/166
33/66/200
33/100/200
66/100/200
Typical
2.5
2.8
3.0
3.0
W
1, 5
Maximum—FP
2.9
3.3
3.5
3.5
W
1, 2
Maximum—INT
2.6
2.9
3.2
3.3
W
1, 3
Doze
1.8
1.9
2.1
2.1
W
1, 4, 6
Nap
667
667
858
858
mW
1, 4, 6
Sleep
477
477
477
762
mW
1, 4, 6
I/O Power Supplies
Mode
Min
Max
Unit
Notes
Typical—OV
DD
200
600
mW
7, 8
Typical—GV
DD
300
900
mW
7, 9
Notes:
1. The values include V
DD
, AV
DD
, AV
DD
2, and LAV
DD
but do not include I/O supply power; see Section 1.7.2, “Power
Supply Sizing,” for information on OV
DD
and GV
DD
supply power. One DIMM is used for memory loading.
2. Maximum—FP power is measured at V
DD
= 2.5 V with dynamic power management enabled while running an
entirely cache-resident, looping, floating-point multiplication instruction.
3. Maximum—INT power is measured at V
DD
= 2.5 V with dynamic power management enabled while running entirely
cache-resident, looping, integer instructions.
4. Power saving mode maximums are measured at V
DD
= 2.5 V while the device is in doze, nap, or sleep mode.
5. Typical power is measured at V
DD
= AV
DD
= 2.5 V, OV
DD
= 3.3 V where a nominal FP value, a nominal INT value,
and a value where there is a continuous flush of cache lines with alternating ones and zeros on 64-bit boundaries
to local memory are averaged.
6. Power saving mode data measured with only two PCI_CLKs and two SDRAM_CLKs enabled.
7. The typical minimum I/O power values were results of the MPC8240 performing cache resident integer operations
at the slowest frequency combination of 33:66:166 (PCI:Mem:CPU) MHz.
8. The typical maximum OV
DD
value resulted from the MPC8240 operating at the fastest frequency combination of
66:100:250 (PCI:Mem:CPU) MHz and performing continuous flushes of cache lines with alternating ones and
zeros to PCI memory.
9. The typical maximum GV
DD
value resulted from the MPC8240 operating at the fastest frequency combination of
66:100:250 (PCI:Mem:CPU) MHz and performing continuous flushes of cache lines with alternating ones and
zeros on 64-bit boundaries to local memory.
10.Power consumption on the PLL supply pins (AV
DD
and AV
DD
2) and the DLL supply pin (LAV
DD
) less than15 mW.
This parameter is guaranteed by design and is not tested.
F
Freescale Semiconductor, Inc.
n
.
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