參數(shù)資料
型號(hào)： QUADS68040UM_D
英文描述： M68360QUADS-040 User＇s Manual
中文描述： M68360QUADS - 040使用手冊(cè)
文件頁(yè)數(shù)： 32/86頁(yè)
文件大小： 1351K
代理商： QUADS68040UM_D
Freescale Semiconductor, Inc.
FUNCTIONAL DESCRIPTION
32
4.11.1
DRAM Controller
The slave QUICC device provides the necessary control signals for the DRAM module. The debugger on
the M68360QUADS-040 reads the presence detect pins (SIMM1 - SIMM4) of the SIMM found in the status
register and sets the DRAM Controller parameters according to the DRAM module’s size and access time.
The available combinations of the presence detect pins are described in TABLE 4-1.
The hardware connection of the slave QUICC to the DRAM module is straight-forward. Since the slave
QUICC doesn’t support address multiplexing for external masters, external address multiplexers are used
to drive the DRAM address lines.
4.11.2
Chip Select TA~ and DSACK~ Generator
The slave QUICC device provides the Chip Select signals for the DRAM, EPROM, bursting EPROM, and
bursting SRAM on the ADS. It also generates the TA~ signal for the 68EC040 during master accesses and
DSACK~ signals for the QUICC during internal accesses, this, according to the access time of the devices
and the working frequency of the board. No external logic is required for the connection of the slave QUICC
to the devices.
4.11.3
ADI Port
The ADI parallel port supplies the parallel link from the M68360QUADS-040 to various host computers.
This port is connected via a 37 line cable to a special board called ADI (Application Development Interface)
installed in the host computer. Two versions of the ADI board are available to support connection to IBM-
PC/XT/AT and SUN-4 SPARC stations. It is possible to connect the M68360QUADS-040 board to these
computers provided that the appropriate software drivers are installed on them.
Each M68360QUADS-040 can have 8 possible slave addresses set for its ADI port, enabling up to 8
M68360QUADS-040 boards to be connected to the same ADI board.
TABLE 4-1. DRAM SIMM Types
SIMM(4:1)
SIMM Type
SIMM Organization
Access
Time (nsec)
Control
Signals
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
MCM36100S10
MCM36512S10
MCM36256S10
MCM36200S10
MCM36100S80
MCM36512S80
MCM36256S80
MCM36200S80
MCM36100S70
MCM36512S70
MCM36256S70
MCM36200S70
MCM36B100ASG60
MCM36B512ASG60
MCM36B256ASG60
MCM36B200ASG60
1M x 36
512K x 36
256K x 36
2M x 36
1M x 36
512K x 36
256K x 36
2M x 36
1M x 36
512K x 36
256K x 36
2M x 36
1M x 36
512K x 36
256K x 36
2M x 36
100
100
100
100
80
80
80
80
70
70
70
70
60
60
60
60
RAS1
RAS1, RAS2
RAS1
RAS1, RAS2
RAS1
RAS1, RAS2
RAS1
RAS1, RAS2
RAS1
RAS1, RAS2
RAS1
RAS1, RAS2
RAS1
RAS1, RAS2
RAS1
RAS1, RAS2
F
For More Information On This Product,
Go to: www.freescale.com
n
.
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