參數(shù)資料
型號: MC68MH360ZQ25LR2
廠商: Freescale Semiconductor
文件頁數(shù): 17/158頁
文件大?。?/td> 0K
描述: IC MPU QUICC 25MHZ 357-PBGA
標準包裝: 180
系列: M683xx
處理器類型: M683xx 32-位
速度: 25MHz
電壓: 5V
安裝類型: 表面貼裝
封裝/外殼: 357-BBGA
供應商設(shè)備封裝: 357-PBGA(25x25)
包裝: 帶卷 (TR)
Chapter 8.Performance
NOTE
FD = Full duplex, HD = Half duplex
Further examples are given in Appendix A of the MPC860
user’s manual.
Using Table 8-2, estimations of bandwidth utilization may be made. To calculate the total
system load, add the CPM utilization from every channel together. Assuming
approximately linear performance versus frequency1, the general problem reduces to taking
simple ratios:
For example, since a 25-MHz Ethernet running at 22 Mbps consumes approximately 100%
of the bandwidth, what bandwidth does a 10-Mbps channel require?
The above equation shows the 10-Mbps channel requiring 45% of the CPM bandwidth.
More examples follow.
1Most protocols’ performance is scalable linearly to frequency with the exception of Ethernet which has
nonlinear behavior. However, for these calculations we assume linear scaling with frequency.
Ethernet
1 : 1.136 HD
22
29
35
44
SMC transparent
1 : 16.67 FD
1.5
1.98
2.4
3
SMC UART
1 : 113.636 FD
0.220
0.290
0.352
0.440
QMC
1 : 11.90 FD
2.1
2.8
3.36
4.2
Bisync
1: 16.67 FD
1.5
1.98
2.4
3
Table 8-2. CPM Performance Table (Continued)
Protocol
SCC Rate: Clock Frequency
Mbps: MHz
Maximum Serial Throughput
25 MHz
Mbps
33 MHz
Mbps
40 MHz
Mbps
50 MHz
Mbps
CPM Utiilization
serial rate
1
max serial rate
1
-------------------------------------
serial rate
2
max serial rate
2
-------------------------------------
+
=
CPM Utilization
serial rate
max serial rate
-----------------------------------
10
22
------
0.45
==
=
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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