參數(shù)資料
型號： MC68MH360ZQ25LR2
廠商： Freescale Semiconductor
文件頁數(shù)： 156/158頁
文件大?。?/td> 0K
描述： IC MPU QUICC 25MHZ 357-PBGA
標(biāo)準(zhǔn)包裝： 180
系列： M683xx
處理器類型： M683xx 32-位
速度： 25MHz
電壓： 5V
安裝類型： 表面貼裝
封裝/外殼： 357-BBGA
供應(yīng)商設(shè)備封裝： 357-PBGA（25x25）
包裝： 帶卷 (TR)
Chapter 6. QMC Initialization
Step 13. Initialize the time slot assignment tables, TSATTx and TSATRx. Each valid entry
should have the V bit set. Clear the W bit in all entries except the last entry in the table. The
‘mask’ bits determine which bits of the time slot are processed by the CPM–normally set
to 0xFF to process all 8 bits. The 6-bit CP eld holds the most-signicant bits of the starting
address of the channel-specic parameter area. For the MH360, the most-signicant bit
must be zero. The 6 least-signicant bits are always cleared. See Section 2.1.3, “TSATRx/
TSATTx Pointers and Time Slot Assignment Table,” for more information. The following
is example pseudocode for TSA table programming:
for (x = 0; x < time slots; x++)
{
SCC1.TSATR[x].W = 0;
/* not last time slot */
SCC1.TSATR[x].CP = x;
/* mark channel number */
SCC1.TSATR[x].mask0_1 = 3;
/* no subchanneling */
SCC1.TSATR[x].mask2_7 = 0x3F; /* no subchanneling */
SCC1.TSATR[x].V = 1;
/* mark time slot valid */
}
SCC1.TSATR[last].W = 1;
/* last time slot wrap */
Step 14. Initialize TSAT pointers (Tx_S_PTR and Rx_S_PTR), and the current time slot
entry pointers, (RxPTR and TxPTR). Initialize both Tx_S_PTR and TxPTR to the rst
entry of the TSATx. Also initialize both Rx_S_PTR and RxPTR to the rst entry of the
TSARx. For common Rx and Tx time slot assignment tables, they all should point to SCC
base + 20; however, they may be located anywhere within the dual-ported RAM. See
Section 2.1.3, “TSATRx/TSATTx Pointers and Time Slot Assignment Table,” for more
information. The following is an example conguration:
SCC1.Tx_S_PTR = SCC1.MCBASE+0x20;/* init pointer to TSATTx table */
SCC1.TxPTR = SCC1.Tx_S_PTR;
SCC1.Rx_S_PTR = SCC1.MCBASE+0x20;/* init pointer to TSATRx table */
SCC1.RxPTR = SCC1.Rx_S_PTR;
Step 15. Initialize multichannel controller state QMC-STATE to 0x8000.
pdpr->SCC1.QMC_STATE = 0x8000;
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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