![](http://datasheet.mmic.net.cn/280000/MC68HC11KW1_datasheet_16094193/MC68HC11KW1_53.png)
MC68HC11KW1
MOTOROLA
4-9
OPERATING MODES AND ON-CHIP MEMORY
4
Timer 2 output comp. 2 (T2OC2) low
$0087
(bit 7)
(6)
(5)
(4)
(3)
(2)
(1)
(bit 0) 1111 1111
Timer 2 output comp. 3 (T20C3) high
$0088
(bit 15)
(14)
(13)
(12)
(11)
(10)
(9)
(bit 8) 1111 1111
Timer 2 output comp. 3(T20C3) low
$0089
(bit 7)
(6)
(5)
(4)
(3)
(2)
(1)
(bit 0) 1111 1111
Timer 2 channel 4 (T2C4) high
$008A
(bit 15)
(14)
(13)
(12)
(11)
(10)
(9)
(bit 8) 1111 1111
Timer 2 channel 4 (T2C4) low
$008B
(bit 7)
(6)
(5)
(4)
(3)
(2)
(1)
(bit 0) 1111 1111
Timer 2 mask (T2MSK)
$008C
OC1I
OC2I
OC3I
C4I
TO2I
0
0
0
0000 0000
Timer 2 flag (T2FLG)
$008D
OC1F
OC2F
OC3F
C4F
TO2F
0
0
0
0000 0000
Port J data (PORTJ)
$008E
PJ7
PJ6
PJ5
PJ4
PJ3
PJ2
PJ1
PJ0
undefined
Data direction J (DDRJ)
$008F
DDJ7
DDJ6
DDJ5
DDJ4
DDJ3
DDJ2
DDJ1
DDJ0 0000 0000
Timer control register 5 (TCTL5)
$0090
OM1
OL1
OM2
OL2
OM3
OL3
OM4
OL4
0000 0000
Timer control register 6 (TCTL6)
$0091
EDGB EDGA PR3B PR3A ECEB ECEA T3STP I1/O4 0000 0000
Timer 3 counter (TCNT3) high
$0092
(bit 15)
(14)
(13)
(12)
(11)
(10)
(9)
(bit 8) 0000 0000
Timer 3 counter (TCNT3) low
$0093
(bit 7)
(6)
(5)
(4)
(3)
(2)
(1)
(bit 0) 0000 0000
Timer 3 output compare 1 (T30C1)
high
$0094
(bit 15)
(14)
(13)
(12)
(11)
(10)
(9)
(bit 8) 1111 1111
Timer 3 output compare 1 (T30C1) low $0095
(bit 7)
(6)
(5)
(4)
(3)
(2)
(1)
(bit 0) 1111 1111
Timer 3 output compare 2 (T30C2)
high
$0096
(bit 15)
(14)
(13)
(12)
(11)
(10)
(9)
(bit 8) 1111 1111
Timer 3 output compare 2 (T30C2) low $0097
(bit 7)
(6)
(5)
(4)
(3)
(2)
(1)
(bit 0) 1111 1111
Timer 3 output comp. 3 (T3OC3) high $0098
(bit 15)
(14)
(13)
(12)
(11)
(10)
(9)
(bit 8) 1111 1111
Timer 3 output comp. 3 (T3OC3) low
$0099
(bit 7)
(6)
(5)
(4)
(3)
(2)
(1)
(bit 0) 1111 1111
Timer 3 channel 4 (T3C4) high
$009A
(bit 15)
(14)
(13)
(12)
(11)
(10)
(9)
(bit 8) 1111 1111
Timer 3 channel 4 (T3C4) low
$009B
(bit 7)
(6)
(5)
(4)
(3)
(2)
(1)
(bit 0) 1111 1111
Timer 3 mask (T3MSK)
$009C
OC1I
OC2I
OC3I
C4I
TO3I
0
0
0
0000 0000
Timer 3 flag (T3FLG)
$009D
OC1F
OC2F
OC3F
C4F
TO3F
0
0
0
0000 0000
Port K data (PORTK)
$009E
PK7
PK6
PK5
PK4
PK3
PK2
PK1
PK0
undefined
Data direction K (DDRK)
$009F
DDK7 DDK6 DDK5 DDK4 DDK3 DDK2 DDK1 DDK0 0000 0000
Table 4-2
Register and control bit assignments (Page 5 of 5)
Register name
Address
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
State
on reset
KEY
x State on reset depends on mode selected
u State of bit on reset is undefined
TPG
51