
7721 Group User’s Manual
17–89
Appendix 11. Electrical characteristics
APPE NDIX
Microprocessor mode : with no Wait
Note:
The limits depend on f(X
IN
). Table 4 lists calculation formulas for the limits.
Limits
t
c
t
w(H)
t
w(L)
t
r
t
f
t
su(PiD–E)
t
h(E–PiD)
External clock input cycle time
External clock input high-level pulse width
External clock input low-level pulse width
External clock input rising time
External clock input falling time
Port Pi input setup time (i = 4–10)
Port Pi input hold time (i = 4–10)
Max.
Parameter
Timing requirements
(V
CC
= 5 V ± 10 %, V
SS
= 0 V, Ta = –20 to 85 °C, f(X
IN
) = 25 MHz, unless otherwise noted)
Symbol
Min.
40
15
15
60
0
Unit
ns
ns
ns
ns
ns
ns
ns
8
8
Limits
t
d(E-PiQ)
t
d(AL–E)
t
d(E–DHQ)
t
pxz(E–DHZ)
t
d(AM–E)
t
d(AM–ALE)
t
d(E–DLQ)
t
pxz(E–DLZ)
t
d(AH–E)
t
d(AH–ALE)
t
d(ALE–E)
t
w(ALE)
t
d(BHE–E)
t
d(BLE–E)
t
d(R/W–E)
t
d(E–
φ
1
)
t
h(E–AL)
t
h(ALE–AM)
t
h(E–DHQ)
t
pzx(E–DHZ)
t
h(E–AM)
t
h(ALE–AH)
t
h(E–DLQ)
t
pzx(E–DLZ)
t
h(E–BHE)
t
h(E–BLE)
t
h(E–R/W)
t
w(EL)
t
su(A–DL)
t
su(ALE–DL)
t
su(A–DH)
t
su(ALE–DH)
Note:
Figure 13 shows the test circuit.
Port Pi data output delay time (i = 4–10)
Address low-order output delay time
Data high-order output delay time (BYTE = “L”)
Data high-order floating start delay time (BYTE = “L”)
Address middle-order output delay time
Address middle-order output delay time
Data low-order output delay time
Data low-order floating start delay time
Address high-order output delay time
Address high-order output delay time
ALE output delay time
____
____
R/W output delay time
φ
1
output delay time
Address low-order hold time
Address middle-order hold time (BYTE = “L”)
Data high-order hold time (BYTE = “L”)
Data high-order floating release delay time (BYTE = “L”)
Address middle-order hold time (BYTE = “H”)
Address high-order hold time
Data low-order hold time
____
R/W hold time
E pulse width
Data low-order setup time after address stabilization
Data low-order setup time after rising of ALE
Data high-order setup time after address stabilization
Data high-order setup time after rising of ALE
Max.
Parameter
Switching characteristics
(V
CC
= 5 V ± 10 %, V
SS
= 0 V, Ta = –20 to 85 °C, f(X
IN
) = 25 MHz, unless otherwise noted)
Symbol
Min.
15
15
5
15
5
4
22
20
20
20
0
18
9
18
20
18
9
18
20
18
18
18
55
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
80
35
0
35
0
18
50
55
50
55
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