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APPLICAT ION
7721 Group User’s Manual
16–15
16.1 Memory connection
When data is output from external memory before falling edge of E signal
Because the external memory outputs data before the falling edge of the E signal, there is a
possibility that the tail of address collides with the head of data. In such a case, generate the
external memory read signal (OE) by using E. (Refer to
“Figure 16.1.11.”
)
Fig. 16.1.11 Example of making data output timing delayed
When using external memory that outputs data for more than t
pzx(E-DLZ/DHZ)
after rising edge of
E signal
Because the external memory outputs data for more than t
pzx(E-DLZ/DHZ)
after the rising edge of the
E signal, there is a possibility that the tail of data collides with the head of address. In such a case,
try to carry out the following:
G
Cut the tail of data output from the memory by using, for example, a bus buffer.
G
Use the Mitsubishi’s memory chips that can be connected without a bus buffer.
Figures 16.1.12 to 16.1.15 show examples of using bus buffers and the timing charts. Table 16.1.6
lists the Mitsubishi’s memory chips that can be connected without a bus buffer. When using one
of these memory chips, timing parameters t
DF
and t
dis(OE)
listed below are guaranteed. Accordingly,
no bus buffer is necessary for the system where the external memory’s read signal (OE) goes high
within t
pzx(E-DLZ/DHZ)
-t
DF
(or t
dis(OE)
) [ns] after the rising edge of the E signal.
Table 16.1.6 Mitsubishi’s memory chips that can be connected without bus buffers
Memory
Flash memory
M5M28F101AP, FP, J, VP, RV-85, -10
M5M28F102AFP, J, VP-85, -10
M5M5256DP, FP, KP, VP, RV-45LL, -45XL, -55LL, -55XL,
-70LL, -70XL
M5M5278DP, J-12
M5M5278DP, FP, J-15, -15L
M5M5278DP, FP, J-20, -20L
Note:
t
DF
or t
dis(OE)
listed above is guaranteed when these memory chips are connected with the M37721.
When the user wants specifications of these memory chips, add a comment “t
DF
/t
dis(OE)
= 15 ns,
microcomputer and kit.”
Note:
Make sure that d
≥
0 is satisfied when generating the external
memory read signal (OE).
External memory
output enable signal
(Read signal)
Address
t
a(OE)
t
en(OE)
E
OE
Address output
External memory
data output
Specifications of
external memory
d
Address
Data
SRAM
Type
t
DF
/t
dis(OE)
(Maximum)
15 ns
(Guaranteed as kit.)
(Note)
6 ns
7 ns
8 ns