
Contents
4
Datasheet
3.0
Register Definitions
.....................................................................................................................26
4.0
Application Information
..............................................................................................................33
4.1
Fiber Optic Module Interface ..............................................................................................33
4.2
Coax Interface ....................................................................................................................33
5.0
Test Specifications
......................................................................................................................36
6.0
Mechanical Specifications
..........................................................................................................46
Figures
1
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4
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14
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19
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22
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26
27
28
29
30
Intel
LXT6155 Block Diagram.....................................................................................................7
Intel
LXT6155 Pin Assignments..................................................................................................8
Intel
LXT6155 System Interface................................................................................................13
Framing State.............................................................................................................................15
Criteria for LOS Output...............................................................................................................16
Receive Frame Synchronization and Frame Pulse Position ......................................................16
Example of CMI Encoded Binary Signal.....................................................................................17
Hardware Mode..........................................................................................................................19
Software Mode ...........................................................................................................................22
Serial Data Output Word Structure (Read Cycle: R/W=High) ....................................................23
Serial Data Input Word Structure (Write Cycle: R/W = Low)......................................................23
Serial Interface ...........................................................................................................................24
Parallel Interface.........................................................................................................................24
Local Loopback ..........................................................................................................................25
Remote Loopback ......................................................................................................................25
3.3 V LVPECL to 3.3 V LVPECL Interface .................................................................................34
75 W Coax Cable Interface ........................................................................................................35
Transmit Parallel Input Data Timing (See
Table 29
)...................................................................38
Transmit Serial Input Data Timing (See
Table 29
)......................................................................38
Receive Serial Output Data Timing (See
Table 31
)....................................................................39
Receive Parallel Output Data Timing (See
Table 31
).................................................................40
Microprocessor Input Timing Diagram........................................................................................41
Microprocessor Output Timing Diagram.....................................................................................42
CMI Encoded Zero per G.703 and STS-3 ..................................................................................42
CMI Encoded One per G.703 and STS-3...................................................................................43
Jitter Tolerance...........................................................................................................................44
Generation Measurement Filter Characteristics.........................................................................45
Typical Coax Jitter Transfer........................................................................................................45
Typical Fiber Jitter Transfer........................................................................................................46
Intel
LXT6155LE Package Specification...................................................................................46