參數(shù)資料
型號(hào): LXT6155LE
元件分類(lèi): 通信、網(wǎng)絡(luò)模塊及開(kāi)發(fā)工具
英文描述: Telecomm/Datacomm
中文描述: 電信/數(shù)據(jù)通信
文件頁(yè)數(shù): 23/48頁(yè)
文件大?。?/td> 1105K
代理商: LXT6155LE
Intel
LXT6155 155 Mbps SDH/SONET/ATM Transceiver
Datasheet
23
2.6
Serial System Interface
The serial interface permits the Intel
LXT6155 to communicate with an Overhead Termination
device at 155.52 Mbps. Data and clock lines are differential 3.3 V LVPECL signals. Refer to
Figure 12
.
2.7
Parallel System Interface
Parallel interface allows the Intel
LXT6155Intel
LXT6155 to communicate with the system chip
at 19.44 MHz, 8 bits per clock cycle. Data and clock lines are TTL compatible signals. Refer to
Figure 13
.
Figure 10. Serial Data Output Word Structure (Read Cycle: R/W=High)
Figure 11. Serial Data Input Word Structure (Write Cycle: R/W = Low)
DON'T
CARE
A2
A1
A0
Don't Care
SCLK
SDI
CS
SDO
High Impedance
Don't Care
A3
DON'T
CARE
A6
A5
A4
R/W
=1
D7
D6
D5
D4
D3
D2
D1
D0
A2
A1
A0
D7
D6
D5
D4
D3
D2
D1
D0
Don't Care
SCLK
SDI
CS
SDO
High Impedance
Don't Care
A3
A6
A5
A4
R/W
=0
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