參數(shù)資料
型號: LPC2368FBD100
廠商: NXP Semiconductors N.V.
元件分類: 數(shù)學(xué)處理器
英文描述: ARM7 with 512 kB flash, 58 kB SRAM, Ethernet, USB 2.0 Device, CAN, SD-MMC, and 10-bit ADC
封裝: LPC2368FBD100<SOT407-1 (LQFP100)|<<http://www.nxp.com/packages/SOT407-1.html<1<Always Pb-free,;
文件頁數(shù): 9/18頁
文件大?。?/td> 220K
代理商: LPC2368FBD100
ES_LPC2368
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Errata sheet
Rev. 9 — 20 April 2011
9 of 18
NXP Semiconductors
ES_LPC2368
Errata sheet LPC2368
3.9 USB.1: USB_NEED_CLK is always asserted
Introduction:
The USB_NEED_CLK signal is used to facilitate going into and waking up from chip
Power Down mode. USB_NEED_CLK is asserted if any of the bits of the USBClkSt
register are asserted.
Problem:
The USB_NEED_CLK bit of the USBIntSt register (located at 0xE01F C1C0) is always
asserted, preventing the chip from entering Power Down mode when the USBWAKE bit is
set in the INTWAKE register (located at 0xE01F C144).
Work-around:
After setting the PCUSB bit in PCONP (located at 0xE01F C0C4), write 0x1 to address
0xFFE0C008. The USB_NEED_CLK signal will now function correctly. Writing to address
0xFFE0C008 only needs to be done once after each chip reset.
3.10 USB.2: U1CONNECT signal is not functional
Introduction:
U1CONNECT Signal (alternate function of P2.9) is part of the SoftConnect USB feature,
which is used to switch an external 1.5 KW resistor under the software control.
Problem:
The USB U1CONNECT alternate function does not work as expected.
Work-around:
Configure P2.9 as a GPIO pin, and use it to enable the pull-up resistor on the U1D+ pin.
3.11 USB.3: V
BUS
status input is not functional
Introduction:
The V
BUS
signal indicates the presence of USB bus power.
Problem:
The V
BUS
status input is not functional.
Work-around:
Configure P1.30 as a GPIO pin, and poll it to determine when V
BUS
goes to 0, signalling a
disconnect event.
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