參數(shù)資料
型號: LPC2388FBD144
廠商: NXP Semiconductors N.V.
元件分類: 數(shù)學(xué)處理器
英文描述: Single-chip 16-bit-32-bit micro; 512 kB flash with ISP-IAP, Ethernet, USB 2.0 device-host-OTG, CAN, and 10-bit ADC-DAC
封裝: LPC2388FBD144<SOT486-1 (LQFP144)|<<http://www.nxp.com/packages/SOT486-1.html<1<Always Pb-free,;
文件頁數(shù): 1/72頁
文件大?。?/td> 1469K
代理商: LPC2388FBD144
1. General description
The LPC2388 microcontroller is based on a 16-bit/32-bit ARM7TDMI-S CPU with
real-time emulation that combines the microcontroller with 512 kB of embedded
high-speed flash memory. A 128-bit wide memory interface and a unique accelerator
architecture enable 32-bit code execution at the maximum clock rate. For critical
performance in interrupt service routines and DSP algorithms, this increases performance
up to 30 % over Thumb mode. For critical code size applications, the alternative 16-bit
Thumb mode reduces code by more than 30 % with minimal performance penalty.
The LPC2388 is ideal for multi-purpose serial communication applications. It incorporates
a 10/100 Ethernet Media Access Controller (MAC), USB device/host/OTG with 4 kB of
endpoint RAM, four UARTs, two CAN channels, an SPI interface, two Synchronous Serial
Ports (SSP), three I
2
C-bus interfaces, an I
2
S-bus interface, and an External Memory
Controller (EMC). This blend of serial communications interfaces combined with an
on-chip 4 MHz internal oscillator, SRAM of 64 kB, 16 kB SRAM for Ethernet, 16 kB SRAM
for USB and general purpose use, together with 2 kB battery powered SRAM make this
device very well suited for communication gateways and protocol converters. Various
32-bit timers, an improved 10-bit ADC, 10-bit DAC, PWM unit, a CAN control unit, and up
to 104 fast GPIO lines with up to 50 edge and up to four level sensitive external interrupt
pins make these microcontrollers particularly suitable for industrial control and medical
systems.
2. Features and benefits
ARM7TDMI-S processor, running at up to 72 MHz.
Up to 512 kB on-chip flash program memory with In-System Programming (ISP) and
In-Application Programming (IAP) capabilities. Flash program memory is on the ARM
local bus for high performance CPU access.
64 kB of SRAM on the ARM local bus for high performance CPU access.
16 kB SRAM for Ethernet interface. Can also be used as general purpose SRAM.
16 kB SRAM for general purpose DMA use also accessible by the USB.
Dual Advanced High-performance Bus (AHB) system that provides for simultaneous
Ethernet DMA, USB DMA, and program execution from on-chip flash with no
contention between those functions. A bus bridge allows the Ethernet DMA to access
the other AHB subsystem.
EMC provides support for static devices such as flash and SRAM as well as off-chip
memory mapped peripherals.
Advanced Vectored Interrupt Controller (VIC), supporting up to 32 vectored interrupts.
LPC2388
Single-chip 16-bit/32-bit micro; 512 kB flash with ISP/IAP,
Ethernet, USB 2.0 device/host/OTG, CAN, and 10-bit ADC/DAC
Rev. 2 — 13 July 2010
Product data sheet
相關(guān)PDF資料
PDF描述
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