參數(shù)資料
型號(hào): LPC1751FBD80
廠商: NXP SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: Cortex-M3 with 32 kB flash, 8 kB SRAM, USB 2.0 Device, CAN, 12-bit ADC
中文描述: 32-BIT, FLASH, 100 MHz, RISC MICROCONTROLLER, PQFP80
封裝: 12 X 12 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT315-1, 80 PIN
文件頁數(shù): 59/74頁
文件大?。?/td> 1572K
代理商: LPC1751FBD80
LPC1759_58_56_54_52_51
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 7 — 29 March 2011
59 of 74
NXP Semiconductors
LPC1759/58/56/54/52/51
32-bit ARM Cortex-M3 microcontroller
[1]
The ADC is monotonic, there are no missing codes.
[2]
The differential linearity error (E
D
) is the difference between the actual step width and the ideal step width. See
Figure 25
.
The integral non-linearity (E
L(adj)
) is the peak difference between the center of the steps of the actual and the ideal transfer curve after
appropriate adjustment of gain and offset errors. See
Figure 25
.
[3]
[4]
The offset error (E
O
) is the absolute difference between the straight line which fits the actual curve and the straight line which fits the
ideal curve. See
Figure 25
.
[5]
The gain error (E
G
) is the relative difference in percent between the straight line fitting the actual transfer curve after removing offset
error, and the straight line which fits the ideal transfer curve. See
Figure 25
.
[6]
The conversion frequency corresponds to the number of samples per second.
Table 18.
T
amb
=
40
C to +85
C unless otherwise specified; 12-bit ADC used as 10-bit resolution ADC.
Symbol Parameter
Conditions
E
D
differential linearity error
E
L(adj)
integral non-linearity
E
O
offset error
E
G
gain error
f
clk(ADC)
ADC clock frequency
3.0 V
V
DDA
3.6 V
2.7 V
V
DDA
< 3.0 V
f
c(ADC)
ADC conversion frequency
3 V
V
DDA
3.6 V
2.7 V
V
DDA
< 3.0 V
ADC characteristics (lower resolution)
Min
Typ
1
1.5
2
2
-
-
-
-
Max
-
-
-
33
25
500
400
Unit
LSB
LSB
LSB
LSB
MHz
MHz
kHz
kHz
[1][2]
-
[3]
-
[4]
-
[5]
-
-
-
[6]
-
[6]
-
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