- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄369714 > L64777 L64777 DVB QAM Modulator technical manual 6/00 PDF資料下載
參數(shù)資料
| 型號： | L64777 |
| 英文描述： | L64777 DVB QAM Modulator technical manual 6/00 |
| 中文描述： | L64777的DVB QAM調(diào)制器技術(shù)手冊6 / 00 |
| 文件頁數(shù)： | 54/124頁 |
| 文件大?。?/td> | 988K |
| 代理商： | L64777 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁當(dāng)前第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁
2-40
Modulator Architecture
Another consideration is that the interpolator receives a 12-bit input from
the Nyquist filter. Set the shifter in the Nyquist filter accordingly (for
example: 2). For PLL Mode 2, the shifter value (which is defined in the
filter coefficients in Register 0 of Group 2) is 3; for Mode 1, the shifter
value is 5.
2.14 Serial Microprocessor Interface
The external microprocessor controls the QAM modes of operation, 16
to 256 QAM. It also controls the mode of input synchronization, that is,
whether to lock synchronization to sync bytes or input pulses. The
microprocessor interface downloads the filter coefficients and the delay
value for proper FIFO initialization.
The microprocessor interface uses an I
2
C-compatible serial control
protocol. The signal behavior is described in Appendix A. The interface
is slave-only and can not be a master to the serial bus. The base address
of the component is composed of a fixed five-bit address and two
selectable bits, which are fed through SB_BASE[1:0] (see Figure 2.24).
Application of these bits must be on a static basis to ensure proper
operation.
Figure 2.24 Serial Bus Base Address
The L64777 output pins and microprocessor interface provide error
indications (for example, the FIFO alarm signal).
The following interface signals are used:
SCL
Serial control line
SDA
Serial data access
INT_n Interrupt, open drain output
The same type of two-wire serial interface is available on the LSI Logic
L64724.
Bit 6, MSB
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0, LSB
1
1
0
1
0
x
x
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| L64777 | Digital Video Broadcasting(DVB)-Compliant,quadrature amplitude modulation (QAM)Modulator(數(shù)字視頻廣播系統(tǒng)適配的積分調(diào)幅調(diào)制器) |
| L64825 | Non-VGA Video Controller |
| L64845 | 64-Bit Graphics (GUI) Accelerator |
| L64850GC-25 | DRAM Controller |
| L64850GC-33 | DRAM Controller |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| L64780 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:L64780 DVB-T COFDM Demodulator technical manual 2/00 |
| L64781 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Single-Chip COFDM Receiver |
| L64782 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:L64782 Single-Chip COFDM Receiver |
| L6480 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:The L6480, realized in analog mixed signal technology, is an advanced fully integrated solution suitable for driving two-phase bipolar stepper motors with microstepping. |
| L64801GC-20 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:32-Bit Microprocessor |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。