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參數(shù)資料
| 型號： | L64777 |
| 英文描述： | L64777 DVB QAM Modulator technical manual 6/00 |
| 中文描述： | L64777的DVB QAM調(diào)制器技術(shù)手冊6 / 00 |
| 文件頁數(shù)： | 30/124頁 |
| 文件大?。?/td> | 988K |
| 代理商： | L64777 |
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2-16
Modulator Architecture
2.5 FIFO Clock Conversion
The L64777 uses a dual-ported RAM to implement the circular buffer
FIFO function. The circular buffer has a write pointer driven by ICLK and
a read pointer driven by the Symbol clock, OCLK/4. The device does not
prevent collisions of the pointers; rather, the PLL-VCO follow-up time and
proper initial setup of the pointer distance must guarantee this.
For FIFO initialization, the L64777 loads a user-programmable pointer
distance of 0 to 127 cycles (the FIFO delay value of Register 2 in
Group 2) into the read address pointer (after each microprocessor delay
register access) and sets the write address pointer to zero (see
Figure 2.9). After this initialization, both pointers run free, and the OCLK
to ICLK frequency relationship determines how the read and write
pointers advance.
To allow outside watching of the asynchronous pointers, an alarm
comparator indicates when both pointers are equal. Because both
counters are Gray Code counters (in which changes occur only in one
bit) the spikes and glitches of the asynchronous signals are minimized.
When specifying the microprocessor download value for the read pointer
initialization, you must use Gray Code. The write pointer also is Gray
Code counter-driven; it initializes to zero when the read counter is
loaded.
Figure 2.9
FIFO Pointer Concept
Properly programmed delay values in Gray Code guarantee that the read
pointer is directly opposite the write pointer most of the time; this
increases system immunity against PLL frequency swings, which might
occur during the phases of an unstable input signal. Smaller distances
also can reduce system delay.
Read Pointer
Circular
Buffer
128 Words
Write Pointer
Zero
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| L64777 | Digital Video Broadcasting(DVB)-Compliant,quadrature amplitude modulation (QAM)Modulator(數(shù)字視頻廣播系統(tǒng)適配的積分調(diào)幅調(diào)制器) |
| L64825 | Non-VGA Video Controller |
| L64845 | 64-Bit Graphics (GUI) Accelerator |
| L64850GC-25 | DRAM Controller |
| L64850GC-33 | DRAM Controller |
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參數(shù)描述 |
|---|---|
| L64780 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:L64780 DVB-T COFDM Demodulator technical manual 2/00 |
| L64781 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Single-Chip COFDM Receiver |
| L64782 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:L64782 Single-Chip COFDM Receiver |
| L6480 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:The L6480, realized in analog mixed signal technology, is an advanced fully integrated solution suitable for driving two-phase bipolar stepper motors with microstepping. |
| L64801GC-20 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:32-Bit Microprocessor |
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