參數資料
型號: L64777
英文描述: L64777 DVB QAM Modulator technical manual 6/00
中文描述: L64777的DVB QAM調制器技術手冊6 / 00
文件頁數: 26/124頁
文件大?。?/td> 988K
代理商: L64777
2-12
Modulator Architecture
Figure 2.6
FIFO Clock Conversion
The L64777 synchronizes the input in the ICLK domain and transfers it
to the OCLK domain with a reserved bit in the circular buffer. It uses a
second bit to transfer the incoming error flag for further insertion into the
most significant bit (MSB) of the second byte of a sync frame, according
to the MPEG-2 standard.
The L64777 also synchronizes the SSTARTIN pin through the circular
buffer, allowing it to lock the beginning of any long-term sequence to the
SYNC_BYTE location of the next sync block. If this pin is not activated
after a reset, all generated sequences run free.
When using the L64777 with the L64724, select Parallel mode, which is
supported with external synchronization pulses. Use the SPI of L64724
in Mode 2 (204 cycle frames with DVALIDIN LOW during the check
bytes). A TEI bit set in the transport stream indicates frames with errors.
A single-line transmission connection to the serial input of the L64777
device generally requires synchronizing on the SYNC_BYTE within the
128 Words
Sync
Detector
FSTARTIN
Serial/Parallel
Sync Word
Block Length
Circular
Buffer
8
8
Error
Insert
Flag
Sync
Insert
Word
Scrambler
Sync
Err.Flg.
Ser/Par
Convert
ERRORIN
Sync Word
Pointer
Collision
Alarm
ICLK domain
OCLK domain
DIN[7:0]*
SSTARTIN
Data
INSYNC
FIFO
SCRAMBLER
* Note that DIN[7:0] is valid data, which is the result of D[7:0] and DVALIDIN HIGH
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L64777 Digital Video Broadcasting(DVB)-Compliant,quadrature amplitude modulation (QAM)Modulator(數字視頻廣播系統(tǒng)適配的積分調幅調制器)
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