參數(shù)資料
型號: L64777
英文描述: L64777 DVB QAM Modulator technical manual 6/00
中文描述: L64777的DVB QAM調(diào)制器技術(shù)手冊6 / 00
文件頁數(shù): 106/124頁
文件大?。?/td> 988K
代理商: L64777
A-4
Programming the L64777 in Serial Host Interface Mode
A.2 Programming the Slave Address Using the Serial Bus
Interface
A general call (master does a start condition followed by eight 0’s)
address is used to address every device on the serial bus. Any device
that requires information to be supplied through this general call structure
must acknowledge the cycle. The second byte has the following meaning
when its LSB is 0 (see Figure A.3):
0b0000 0110 (0x6): Reset and write the programmable part of
the slave address by hardware from the SB_BASE pins.
Figure A.3
General Call Structure
A.3 Write Cycle Using the Serial Bus Interface
Figure A.4 shows the timing for a burst, or a single-write cycle. The
following cycles must take place for a write cycle:
1.
The master starts the cycle with the start condition.
2.
The master transmits the 7-bit slave address.
3.
The master transmits an 8th bit (the R/W bit) = 0 to indicate a write
cycle.
4.
The addressed slave acknowledges the reception of the slave
address by driving SDA low in the ACK cycle.
5.
The master sends the 8-bit Group 0 address (0x0) to indicate that
the Address Programming register (APR) is to be loaded. (The
master accesses Group 0 only to load the APR.)
6.
The master then sends the 8-bit data, which initializes the address
pointer register (APR0).
0
0
0
0
0
0
0
0
X
A
X X X
X
X
A
X
0
S
General Call Address.
S: Start Condition
A: Acknowledge Cycle
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