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參數(shù)資料
| 型號(hào)： | KM4216C258 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 256K x 16 Bit CMOS Video RAM(256K x 16 位 CMOS視頻RAM) |
| 中文描述： | 256K × 16位的CMOS視頻RAM（256K × 16位的CMOS視頻內(nèi)存） |
| 文件頁(yè)數(shù)： | 10/41頁(yè) |
| 文件大?。?/td> | 772K |
| 代理商： | KM4216C258 |
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KM4216C258
CMOS VIDEO RAM
Rev. 0.1 (Mar. 1998)
NOTES
9. Either
t
RCH
or
t
RRH
must be satisfied for a read cycle.
10. These parameters are referenced to the CAS leading edge
in early write cycles and to the WE leading edge in read-write
cycles.
11. Operation within the
t
RAD
(max) limit insured that
t
RAC
(max)
can be met.
t
RAD
(max) is specified as a reference point only.
If
t
RAD
is greater than the specified
t
RAD
(max) limit, then
access time is controlled by
t
AA
.
12. Power must be applied to the RAS and DT/OE input signal to
pull them high before or at the same time as the V
CC
supply is
turned on.
After power-up, initial status of chip is described below.
13. Recommended operating input condition :
Input pulse levels are from 0.0V to 3.0Volts.
All timing measurements are referenced from V
IL
(max)
and V
IH
(min) with transition time = 2ns
14. Assume
t
T
= 3ns.
15.
t
ASC
,
t
CAH
are referenced to the earlier CAS falling edge
16.
t
CP
is specified from the last CAS rising edge in the previous
cycle to the first CAS falling edge in the next cycle.
17.
t
CWD
is referenced to the later CAS falling edge at word
read-modify-write cycle.
18.
t
CWL
is specified from WB/WE falling edge to the earlier
CAS rising edge.
Pin or Register
Status
QSF
Hi-Z
Color Register
Don
′
t Care
Write Mask Register
Don
′
t Care
Tap Pointer
Invalid
Stop Register
Default Case
Wi/DQi
Hi-Z
SAM Port
Hi-Z
SQi
Hi-Z
CASL
CASU
WB/WE
Addr.
t
ASC
t
ASC
t
CWD
t
CP
t
CWL
19.
t
CSR
is referenced to earlier CAS falling low before RAS
transition low.
20.
t
CHR
is referenced to the later CAS rising high after RAS
transition low.
RAS
CASL
t
CSR
t
CHR
21.
t
ASC
≥
t
CP
(min), at Normal cycle, Assum
t
T
=2.0ns
22.
t
ASC
<
t
CP
(min), at Normal cycle or any condition at Block
write cycle, Assume
t
T
=2ns
CASU
0V
3.0V
t
T
2.4V
0.8V
t
T
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