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參數資料
| 型號： | KM432C515 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 512K x 32Bit CMOS Quad CAS DRAM with EDO(512K x 32位CMOS四 CAS 動態(tài)RAM(帶EDO模式)) |
| 中文描述： | 為512k × 32Bit的中科院的CMOS四路DRAM與江戶（512k × 32的位的CMOS四中科院動態(tài)隨機存儲器（帶EDO公司模式）） |
| 文件頁數： | 1/21頁 |
| 文件大?。?/td> | 361K |
| 代理商： | KM432C515 |
CMOS DRAM
KM432C515, KM432V515
REV. 0.
Apr. 1998
This is a 524,288 x 32 bit Extended Data Out CMOS DRAM. Extended Data Out Mode offers high speed random access of memory cells
within the same row, so called Hyper Page Mode. Power supply voltage (+5.0V or +3.3V), refresh cycle 1K, access time (-5 or -6), power
consumption(Normal or Low power) and SOJ package type are optional features of this family. All of this family have CAS-before-RAS
refresh, RAS-only refresh and Hidden refresh capabilities. Furthermore, Self-refresh operation is available in L-version. This 512Kx32
EDO Mode Quad CAS DRAM is fabricated using Samsung's advanced CMOS process to realize high band-width, low power consump-
tion and high reliability.
Part Identification
- KM432C515J (5.0V, 1K Ref.)
- KM432C515J-L (5.0V, 1K Ref. LP)
- KM432V515J- (3.3V, 1K Ref.)
- KM432V515J-L (3.3V, 1K Ref. LP)
Extended Data Out Mode operation
(Fast Page Mode with Extended Data Out)
Four separate CAS pins provide for separate I/O operation
CAS-before-RAS refresh capability
RAS-only and Hidden refresh capability
Self-refresh capability (L-ver only)
TTL(5V)/LVTTL(3.3V) compatible inputs and outputs
Early Write or output enable controlled write
JEDEC Standard pinout
Plastic SOJ 400mil x 1125mil package
Single +5.0V
±
0.5V power supply(5V product)
Single +3.3V
±
0.3V power supply(3.3V product)
Control
Clocks
VBB Generator
Refresh Timer
Refresh Control
Refresh Counter
Row Address Buffer
Col. Address Buffer
Row Decoder
Column Decoder
RAS
CAS0-3
W
Vcc
Vss
DQ0
to
DQ7
A0 - A9
A0 - A8
Memory
Array
524,288 x 32
Cells
SAMSUNG ELECTRONICS CO., LTD.
reserves the right to
change products and specifications without notice.
512K x 32Bit CMOS Quad CAS DRAM with EDO
DESCRIPTION
FEATURES
FUNCTIONAL BLOCK DIAGRAM
Performance Range
Speed
-5
-6
t
RAC
50ns
60ns
t
CAC
15ns
17ns
t
RC
84ns
104ns
t
HPC
20ns
27ns
Remark
5.0V only
5V/3.3V
DCAS0
OE
Refresh Cycles
Part
NO.
V
CC
Refresh
cycle
Refresh period
Normal
16ms
16ms
L-ver
128ms
128ms
432C515J
432V515J
5.0V
3.3V
1K
1K
Active Power Dissipation
Speed
-5
-6
3.3V
-
540
5.0V
880
825
Unit : mW
D/CAS0
DCAS1
D/CAS1
DCAS2
D/CAS2
DCAS3
D/CAS3
DQ8
to
DQ15
DQ16
to
DQ23
DQ24
to
DQ31
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