參數(shù)資料
型號: K9WAG08U1M
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: 1G x 8 Bit / 2G x 8 Bit NAND Flash Memory
中文描述: 1克× 8位/第二代× 8位NAND閃存
文件頁數(shù): 8/49頁
文件大小: 1215K
代理商: K9WAG08U1M
FLASH MEMORY
8
Preliminary
K9
WA
G08U1M
K9K8G08U0M
2K Bytes
64 Bytes
Figure 1. K9K8G08U0M Functional Block Diagram
Figure 2. K9K8G08U0M Array Organization
NOTE
: Column Address : Starting Address of the Register.
* L must be set to "Low".
* The device ignores any additional input of address cycles than required.
I/O 0
I/O 1
I/O 2
I/O 3
I/O 4
I/O 5
I/O 6
I/O 7
1st Cycle
A
0
A
1
A
2
A
3
A
4
A
5
A
6
A
7
2nd Cycle
A
8
A
9
A
10
A
11
*L
*L
*L
*L
3rd Cycle
A
12
A
13
A
14
A
15
A
16
A
17
A
18
A
19
4th Cycle
A
20
A
21
A
22
A
23
A
24
A
25
A
26
A
27
5th Cycle
A
28
A
29
A
30
*L
*L
*L
*L
*L
V
CC
V
SS
X-Buffers
Latches
& Decoders
Command
Register
I/O Buffers & Latches
Y-Buffers
Latches
& Decoders
Control Logic
& High Voltage
Generator
Global Buffers
Output
Driver
A
12
- A
30
A
0
- A
11
Command
CE
RE
WE
CLE
WP
I/0 0
I/0 7
V
CC
V
SS
512K Pages
(=8,192 Blocks)
2K Bytes
8 bit
64 Bytes
1 Block = 64 Pages
(128K + 4k) Byte
I/O 0 ~ I/O 7
1 Page = (2K + 64)Bytes
1 Block = (2K + 64)B x 64 Pages
= (128K + 4K) Bytes
1 Device = (2K+64)B x 64Pages x 8,192 Blocks
= 8,448 Mbits
Row Address
Page Register
ALE
8,192M + 256M Bit
NAND Flash
ARRAY
(2,048 + 64)Byte x 524,288
Y-Gating
Row Address
Column Address
Column Address
Row Address
Data Register & S/A
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