- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄374300 > K9WAG08U1M (SAMSUNG SEMICONDUCTOR CO. LTD.) 1G x 8 Bit / 2G x 8 Bit NAND Flash Memory PDF資料下載
參數(shù)資料
| 型號： | K9WAG08U1M |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 1G x 8 Bit / 2G x 8 Bit NAND Flash Memory |
| 中文描述： | 1克× 8位/第二代× 8位NAND閃存 |
| 文件頁數(shù)： | 12/49頁 |
| 文件大?。?/td> | 1215K |
| 代理商： | K9WAG08U1M |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁當前第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁
FLASH MEMORY
12
Preliminary
K9
WA
G08U1M
K9K8G08U0M
CAPACITANCE
(
T
A
=25
°
C, V
CC
=3.3V, f=1.0MHz)
NOTE
: Capacitance is periodically sampled and not 100% tested.
K9WAG08U1M-IXB0’s capacitance(I/O, Input) is 20pF.
Item
Symbol
Test Condition
Min
Max
Unit
K9K8G08U0M
K9WAG08U1M*
Input/Output Capacitance
C
I/O
V
IL
=0V
-
20
40
pF
Input Capacitance
C
IN
V
IN
=0V
-
20
40
pF
VALID BLOCK
NOTE
:
1. The device may include initial invalid blocks when first shipped. Additional invalid blocks may develop while being used. The number of valid blocks is
presented with both cases of invalid blocks considered. Invalid blocks are defined as blocks that contain one or more bad bits. Do not erase or pro-
gram factory-marked bad blocks. Refer to the attached technical notes for appropriate management of invalid blocks.
2. The 1st block, which is placed on 00h block address, is guaranteed to be a valid block up to 1K program/erase cycles with 1bit/512Byte ECC.
3. The number of valid block is on the basis of single plane operations, and this may be decreased with two plane operations.
* : Each K9K8G08U0M chip in the K9WAG08U1M has Maximun 160 invalid blocks.
Parameter
Symbol
Min
Typ.
Max
Unit
K9K8G08U0M
N
VB
8,032
-
8,192
Blocks
K9WAG08U1M
N
VB
16,064*
-
16,384*
Blocks
AC TEST CONDITION
(K9XXG08UXM-XCB0: T
A
=0 to 70
°
C, K9XXG08UXM-XIB0:T
A
=-40 to 85
°
C ,K9XXG08UXM: Vcc=2.7V~3.6V unless otherwise noted)
Parameter
K9XXG08UXM
Input Pulse Levels
0V to Vcc
Input Rise and Fall Times
5ns
Input and Output Timing Levels
Vcc/2
Output Load
1 TTL GATE and CL=50pF (K9K8G08U0M-Y,P/K9WAG08U1M-I)
1 TTL GATE and CL=30pF (K9WAG08U1M-Y,P)
MODE SELECTION
NOTE
: 1. X can be V
IL
or V
IH.
2. WP should be biased to CMOS high or CMOS low for standby.
CLE
ALE
CE
WE
RE
WP
Mode
H
L
L
H
X
Read Mode
Command Input
L
H
L
H
X
Address Input(5clock)
H
L
L
H
H
Write Mode
Command Input
L
H
L
H
H
Address Input(5clock)
L
L
L
H
H
Data Input
L
L
L
H
X
Data Output
X
X
X
X
H
X
During Read(Busy)
X
X
X
X
X
H
During Program(Busy)
X
X
X
X
X
H
During Erase(Busy)
X
X
(1)
X
X
X
L
Write Protect
X
X
H
X
X
0V/V
CC
(2)
Stand-by
相關PDF資料 |
PDF描述 |
|---|---|
| K9S2808V0B | TV 29C 29#16 PIN RECP |
| K9S6408V0B | SmartMedia CARD |
| K9S6408V0C | SmartMedia CARD |
| K9S3208V0A | 4M x 8 bit SmartMedia Card |
| K9S3208V0A-SSB0 | 4M x 8 bit SmartMedia Card |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| K9WBG08U1M-PCB0000 | 制造商:Samsung SDI 功能描述:PN may be NE NA |
| K9WBG08U1M-PCB0T00 | 制造商:Samsung 功能描述:SLC 8GB 32GB QDP X8 3.3 TSOP1 - Tape and Reel |
| K9WBG08U1M-PCK0000 | 制造商:Samsung SDI 功能描述: |
| K9WBG08U1M-PCK0T00 | 制造商:Samsung 功能描述:SLC 8GB 32GB QDP X8 3.3 TSOP1 TR - Tape and Reel |
| K9WBG08U1M-PIB0000 | 制造商:Samsung SDI 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復。