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參數(shù)資料
| 型號： | K9WAG08U1M |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 1G x 8 Bit / 2G x 8 Bit NAND Flash Memory |
| 中文描述： | 1克× 8位/第二代× 8位NAND閃存 |
| 文件頁數(shù)： | 48/49頁 |
| 文件大?。?/td> | 1215K |
| 代理商： | K9WAG08U1M |
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FLASH MEMORY
48
Preliminary
K9
WA
G08U1M
K9K8G08U0M
READY/BUSY
The device has a R/B output that provides a hardware method of indicating the completion of a page program, erase and random
read completion. The R/B pin is normally high but transitions to low after program or erase command is written to the command regis-
ter or random read is started after address loading. It returns to high when the internal controller has finished the operation. The pin is
an open-drain driver thereby allowing two or more R/B outputs to be Or-tied. Because pull-up resistor value is related to tr(R/B) and
current drain during busy(ibusy) , an appropriate value can be obtained with the following reference chart(Fig.20). Its value can be
determined by the following guidance.
V
CC
R/B
open drain output
Device
GND
Rp
t
I
Rp(ohm)
Figure 20. Rp vs tr ,tf & Rp vs ibusy
Ibusy
tr
ibusy
Busy
Ready Vcc
@ Vcc = 3.3V, Ta = 25
°
C , C
L
= 50pF
VOH
tf
tr
1K
2K
3K
4K
50n
100n
150n
3m
2m
1m
50
tf
100
150
200
1.8
1.8
1.8
1.8
2.4
1.2
0.8
0.6
VOL
where I
L
is the sum of the input currents of all devices tied to the R/B pin.
Rp value guidance
Rp(max) is determined by maximum permissible limit of tr
Rp(min, 3.3V part) =
V
CC
(Max.) - V
OL
(Max.)
I
OL
+
Σ
I
L
=
3.2V
8mA
+
Σ
I
L
3.3V device - V
OL
: 0.4V, V
OH
: 2.4V
C
L
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| K9WBG08U1M-PCB0000 | 制造商:Samsung SDI 功能描述:PN may be NE NA |
| K9WBG08U1M-PCB0T00 | 制造商:Samsung 功能描述:SLC 8GB 32GB QDP X8 3.3 TSOP1 - Tape and Reel |
| K9WBG08U1M-PCK0000 | 制造商:Samsung SDI 功能描述: |
| K9WBG08U1M-PCK0T00 | 制造商:Samsung 功能描述:SLC 8GB 32GB QDP X8 3.3 TSOP1 TR - Tape and Reel |
| K9WBG08U1M-PIB0000 | 制造商:Samsung SDI 功能描述: |
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