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參數(shù)資料
| 型號： | K9T1G08U0M |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 128M x 8 Bits NAND Flash Memory |
| 中文描述： | 128M的x 8位NAND閃存 |
| 文件頁數(shù)： | 37/38頁 |
| 文件大?。?/td> | 888K |
| 代理商： | K9T1G08U0M |
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FLASH MEMORY
37
K9T1G08U0M
Preliminary
READY/BUSY
The device has a R/B output that provides a hardware method of indicating the completion of a page program, erase and random
read completion. The R/B pin is normally high but transitions to low after program or erase command is written to the command regis-
ter or random read is started after address loading. It returns to high when the internal controller has finished the operation. The pin is
an open-drain driver thereby allowing two or more R/B outputs to be Or-tied. Because pull-up resistor value is related to tr(R/B) and
current drain during busy(ibusy) , an appropriate value can be obtained with the following reference chart(Fig 23). Its value can be
determined by the following guidance.
V
CC
R/B
open drain output
Device
GND
Rp
t
I
Rp(ohm)
Fig 23 Rp vs tr ,tf & Rp vs ibusy
Ibusy
tr
ibusy
Busy
Ready Vcc
@ Vcc = 3.3V, Ta = 25
°
C , C
L
= 100pF
VOH
tf
tr
1K
2K
3K
4K
100n
200n
300n
3m
2m
1m
100
tf
200
300
400
3.6
3.6
3.6
3.6
2.4
1.2
0.8
0.6
VOL
where I
L
is the sum of the input currents of all devices tied to the R/B pin.
Rp value guidance
Rp(max) is determined by maximum permissible limit of tr
Rp(min) =
V
CC
(Max.) - V
OL
(Max.)
I
OL
+
Σ
I
L
=
3.2V
8mA
+
Σ
I
L
V
OL
: 0.4V, V
OH
: 2.4V
C
L
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