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參數(shù)資料
| 型號： | K9T1G08U0M |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 128M x 8 Bits NAND Flash Memory |
| 中文描述： | 128M的x 8位NAND閃存 |
| 文件頁數(shù)： | 11/38頁 |
| 文件大小： | 888K |
| 代理商： | K9T1G08U0M |
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FLASH MEMORY
11
K9T1G08U0M
Preliminary
AC Characteristics for Operation
NOTE
:
1. If reset command(FFh) is written at Ready state, the device goes into Busy for maximum 5us.
2. To break the sequential read cycle, CE must be held high for longer time than tCEH.
3. The time to Ready depends on the value of the pull-up resistor tied R/B pin.
Parameter
Symbol
Min
Max
Unit
Data Transfer from Cell to Register
t
R
-
15
μ
s
ALE to RE Delay
t
AR
10
-
ns
CLE to RE Delay
t
CLR
10
-
ns
Ready to RE Low
t
RR
20
-
ns
RE Pulse Width
t
RP
25
-
ns
WE High to Busy
t
WB
-
100
ns
Read Cycle Time
t
RC
50
-
ns
CE Access Time
t
CEA
-
45
ns
RE Access Time
t
REA
-
30
ns
RE High to Output Hi-Z
t
RHZ
-
30
ns
CE High to Output Hi-Z
t
CHZ
-
20
ns
RE or CE High to Output hold
t
OH
15
-
ns
RE High Hold Time
t
REH
15
-
ns
Output Hi-Z to RE Low
t
IR
0
-
ns
WE High to RE Low
t
WHR
60
-
ns
Device Resetting Time
(Read/Program/Erase)
t
RST
-
5/10/500
(1)
μ
s
Last RE High to Busy(at sequential read)
t
RB
-
100
ns
CE High to Ready(in case of interception by CE at read)
t
CRY
-
50 + tr(R/B)
(3)
ns
CE High Hold Time(at the last serial read)
(2)
t
CEH
100
-
ns
AC Timing Characteristics for Command / Address / Data Input
NOTE
:
1. If tCS is set less than 10ns, tWP must be minimum 35ns, otherwise, tWP may be minimum 25ns.
Parameter
Symbol
Min
Max
Unit
CLE Set-up Time
t
CLS
0
-
ns
CLE Hold Time
t
CLH
5
-
ns
CE Setup Time
t
CS
0
.-
ns
CE Hold Time
t
CH
5
-
ns
WE Pulse Width
t
WP
25
(1)
-
ns
ALE Setup Time
t
ALS
0
-
ns
ALE Hold Time
t
ALH
5
-
ns
Data Setup Time
t
DS
20
-
ns
Data Hold Time
t
DH
5
-
ns
Write Cycle Time
t
WC
45
-
ns
WE High Hold Time
t
WH
15
-
ns
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