參數(shù)資料
型號(hào)： K9T1G08U0M
廠商： SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述： 128M x 8 Bits NAND Flash Memory
中文描述： 128M的x 8位NAND閃存
文件頁(yè)數(shù)： 36/38頁(yè)
文件大?。?/td> 888K
代理商： K9T1G08U0M
FLASH MEMORY
36
K9T1G08U0M
Preliminary
Figure 21-2. Read ID (2) Operation
CE
CLE
I/O
0
~
7
ALE
RE
WE
91h
00h
20h
Address. 1cycle
Extended ID Code
t
CEA
t
AR
t
REA
t
WHR
Figure 22. RESET Operation
RESET
The device offers a reset feature, executed by writing FFh to the command register. When the device is in Busy state during random
read, program or erase mode, the reset operation will abort these operations. The contents of memory cells being altered are no
longer valid, as the data will be partially programmed or erased. The command register is cleared to wait for the next command, and
the Status Register is cleared to value C0h when WP is high. Refer to table 5 for device status after reset operation. If the device is
already in reset state a new reset command will not be accepted by the command register. The R/B pin transitions to low for tRST
after the Reset command is written. Refer to Figure 22 below.
After Power-up
After Reset
Operation Mode
Read 1
Waiting for next command
FFh
I/O
0
~
7
R/B
Table5. Device Status
t
RST
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