參數(shù)資料
型號: ISPPAC-POWR6AT6-01NN32I
廠商: LATTICE SEMICONDUCTOR CORP
元件分類: 電源管理
英文描述: In-System Programmable Power Supply Monitoring and Margining Controller
中文描述: 6-CHANNEL POWER SUPPLY SUPPORT CKT, QCC32
封裝: 5 X 5 MM, LEAD FREE, QFN-32
文件頁數(shù): 31/34頁
文件大?。?/td> 906K
代理商: ISPPAC-POWR6AT6-01NN32I
Lattice Semiconductor
ispPAC-POWR6AT6 Data Sheet
31
RESET
- This command resets the ispPAC-POWR6AT6 to a condition near that of the power-on reset state (refer to
reset command via JTAG or I
2
C section of this data sheet for more details and known exceptions).
ERASE_DONE_BIT
- This instruction erases the ispPAC-POWR6A6 DONE bit.
CFG_VERIFY
- This instruction is used to verify the contents of the selected configuration array column. This spe-
cific column is preselected by using CFG_ADDRESS instruction.
CFG_ERASE
- This instruction will bulk erase the configuration array. The action occurs at the second rising edge
of TCK in Run-Test-Idle JTAG state. The device must already be in programming mode (PROGRAM_ENABLE
instruction).
CFG_ADDRESS
- This instruction is used to set the address of the configuration array for subsequent program or
read operations.
CFG_DATA_SHIFT
- This instruction is used to shift data into the configuration register prior to programming or
reading.
CFG_PROGRAM
- This instruction programs the selected configuration array column. This specific column is pre-
selected by using CFG_ADDRESS instruction. The programming occurs at the second rising edge of the TCK in
Run-Test-Idle JTAG state. The device must already be in programming mode (PROGRAM_ENABLE instruction).
PROGRAM_DONE_BIT
- This instruction programs the ispPAC-POWR6A6 DONE bit.
Note: Before any of the above programming instructions are executed, the respective E
2
CMOS bits need to be
erased using the corresponding erase instruction
相關(guān)PDF資料
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