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參數(shù)資料
| 型號： | ISPPAC-POWR6AT6-01NN32I |
| 廠商： | LATTICE SEMICONDUCTOR CORP |
| 元件分類： | 電源管理 |
| 英文描述： | In-System Programmable Power Supply Monitoring and Margining Controller |
| 中文描述： | 6-CHANNEL POWER SUPPLY SUPPORT CKT, QCC32 |
| 封裝： | 5 X 5 MM, LEAD FREE, QFN-32 |
| 文件頁數(shù)： | 14/34頁 |
| 文件大?。?/td> | 906K |
| 代理商： | ISPPAC-POWR6AT6-01NN32I |
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Lattice Semiconductor
ispPAC-POWR6AT6 Data Sheet
14
Table 1. TrimCell Voltage Profile and Operating Modes
TrimCell Operation in Voltage Profiles 1, 2 and 3:
The output trimming voltage is determined by the code stored
in the DAC Registers 1, 2, and 3 corresponding to the selected Voltage Profile.
TrimCell Operation in Voltage Profile 0:
The Voltage Profile 0 has three operating modes. They are DAC Register
0 Select mode, DAC Register I
2
C Select mode and Closed Loop Trim mode. The mode selection is stored in the
E
2
CMOS configuration memory. Each of the six TrimCells can be independently set to different operating modes
during Voltage Profile 0 mode of operation.
DAC Register 0 Select Mode:
The contents of DAC register 0 are stored in the on-chip E
2
CMOS memory. When
Voltage Profile 0 is selected, the DAC will be loaded with the value stored in DAC Register 0.
DAC Register I
2
C Select Mode:
This mode is used if the power management arrangement requires an external
microcontroller to control the DC-DC converter output voltage. The microcontroller updates the contents of the DAC
Register I
2
C on the fly to set the trimming voltage to a desired value. The DAC Register I
2
C is a volatile register and
is reset to 80H (DAC at Bipolar zero) upon power-on. The external microcontroller writes the correct DAC code in
this DAC Register I
2
C before enabling the programmable power supply.
Digital Closed Loop Trim Mode
Closed loop trim mode operation can be used when tight control over the DC-DC converter output voltage at a
desired value is required. The closed loop trim mechanism operates by comparing the measured output voltage of
the DC-DC converter with the internally stored voltage setpoint. The difference between the setpoint and the actual
DC-DC converter voltage generates an error voltage. This error voltage adjusts the DC-DC converter output volt-
age toward the setpoint. This operation iterates until the setpoint and the DC-DC converter voltage are equal.
Figure 10 shows the closed loop trim operation of a TrimCell. At regular intervals (as determined by the Update
Rate Control register) the ispPAC-POWR6AT6 device initiates the closed loop power supply voltage correction
cycle through the following blocks:
Non-volatile
Setpoint
register stores the desired output voltage
On-chip
ADC
is used to measure the voltage of the DC-DC converter
Three-state comparator
is used to compare the measured voltage from the ADC with the
Setpoint
regis-
ter contents. The output of the three state comparator can be one of the following:
+1 if the setpoint voltage is greater than the DC-DC converter voltage
-1 if the setpoint voltage is less than the DC-DC converter voltage
0 if the setpoint voltage is equal to the DC-DC converter voltage
Channel polarity control
determines the polarity of the error signal
Closed loop trim register
is used to compute and store the DAC code corresponding to the error voltage.
The contents of the Closed Loop Trim will be incremented or decremented depending on the channel polar-
ity and the three-state comparator output. If the three-state comparator output is 0, the closed loop trim reg-
ister contents are left unchanged.
The
DAC
in the
TrimCell
is used to generate the analog error voltage that adjusts the attached DC-DC con-
verter output voltage.
VPS[1:0]
11
10
01
Selected Voltage Profile
Voltage Profile 3
Voltage Profile 2
Voltage Profile 1
Selected Mode
—
—
—
DAC Register 0 Select
DAC Register I
2
C Select
Digital Closed Loop Trim
Trimming Voltage
is Controlled by
DAC Register 3 (E
2
CMOS)
DAC Register 2 (E
2
CMOS)
DAC Register 1 (E
2
CMOS)
DAC Register 0 (E
2
CMOS)
DAC Register (I
2
C)
Closed Loop Trim Register
00
Voltage Profile 0
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