HT82A851R
Rev. 1.20
6
June 15, 2007
Program Memory
PROM
The program memory is used to store the executable
program instructions which are to be executed. It also
contains data, table, and interrupt entries, and is orga-
nized into 4096 15 bits, addressed by the program
counter and table pointer.
Certain locations in the program memory are reserved
for special usage:
Location 000H
This area is reserved for program initialization. After a
chip reset, the program always begins execution at lo-
cation 000H.
Location 004H
This area is reserved for the USB interrupt service
program. If the USB interrupt is activated, the interrupt
is enabledand the stack is not full, the program begins
execution at location 004H.
Location 008H
ThisareaisreservedfortheTimer/EventCounter0in-
terrupt service program. If a timer interrupt results
from a Timer/Event Counter 0 overflow, and if the in-
terrupt is enabled and the stack is not full, the program
begins execution at location 008H.
Location 00CH
ThisareaisreservedfortheTimer/EventCounter1in-
terrupt service program. If a timer interrupt results
from a Timer/Event Counter 1 overflow, and the inter-
rupt is enabled and the stack is not full, the program
begins execution at location 00CH.
Location 010H
This area is reserved for the play interrupt service pro-
gram. If play data is valid, and the interrupt is enabled
and the stack is not full, the program begins execution
at location 010H.
Location 014H
This area is reserved for when 8 bits of data have
beenreceivedortransmittedsuccessfullyfromthese-
rial interface. If the related interrupts are enabled, and
the stack is not full, the program begins execution at
location 014H.
Location 018H
This area is reserved for the record interrupt service
program. If the record frequency time out (8kHz), the
interrupt is enabled and the stack is not full, the pro-
gram begins execution at location 018H.
Table location
Any location in the program memory can be used as a
look-up table. There are three method to read the pro-
gram memory data. The first method uses the
TABRDC instruction to transfer the contents of the
current page lower-order byte to the specified data
memory, and the current page higher-order byte to the
TBLH register. The second method uses the TABRDL
instruction to transfer the contents of the last page
lower-order byte to the specified data memory, and
the last page higher-order byte to the TBLH register.
The third method uses the TABRDC instruction to-
gether with the TBLP and TBHP pointers to transfer
the contents of the lower order byte at the specified
address to the specified data memory, and the higher
order byte at the specified address to the TBLH regis-
ter. Before accessing the table data, the address to be
read must be placed in the table pointer registers,
TBLP and TBHP. Note that if the configuration option
TBHP is disabled, then the value in TBHP has no ef-
fect. Only the destination of the lower-order byte in the
table is well-defined, the other bits of the table word
are transferred to the lower portion of
TBLH
, and the
remaining 1-bit word is read as
Higher-order byte register, TBLH, is read only. The
TBLH register is read only and cannot be restored. If
the main routine and the ISR (Interrupt Service Rou-
tine) both employ the table read instruction, the con-
tents of TBLH in the main routine are likely to be
changed by the table read instruction used in the ISR.
0 .The Table
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Program Memory
Instruction
Table Location
*11
*10
*9
*8
*7
*6
*5
*4
*3
*2
*1
*0
TABRDC [m]
P11
P10
P9
P8
@7
@6
@5
@4
@3
@2
@1
@0
TABRDL [m]
1
1
1
1
@7
@6
@5
@4
@3
@2
@1
@0
Table Location
Note: *11~*0: Table location bits
P11~P8: Current program counter bits when TBHP is disabled
P11~P8: Current program counter bits
@7~@0: Table pointer bits
TBHP register bit3~bit0 when TBHP is enabled