HT82A851R
Rev. 1.20
19
June 15, 2007
The AWR register contains the current address and a remote wake up function control bit. The initial value of AWR is
00H . The address value extracted from the the USB command has not to be loaded into this register until the SETUP
stage has finished.
Bit No.
Label
R/W
Power-on
Functions
0
WKEN
R/W
0
USB remote-wake-up enable/disable (1/0)
1~7
AD0~AD6
R/W
0000000
USB device address
AWR (23H) Register
The STALLregister shows if the corresponding endpoint works properly or not. As soon as the endpoint works improp-
erly, the related bit in the STALL has to be set to 1 . The STALL register will be cleared by a USB reset signal.
Bit No.
Label
R/W
Power-on
Functions
0~4
STL0~STL4
R/W
00000
Set by the user when related USB endpoints were stalled.
Cleared by a USB reset and a Setup Token event.
5~7
STL5~STL7
000
Undefined bit, read as 0 .
STALL (24H) Register
Bit No.
Label
R/W
Power-on
Functions
0
ASET
R/W
0
This bit is used to configure the SIE to automatically change the device
address by the value stored in the AWR register. When this bit is set to
1 by firmware, the SIE will update the device address by the value
stored in the AWR register after the PC host has successfully read the
data from the device by an IN operation. Otherwise, when this bit is
cleared to 0 , the SIE will update the device address immediately after
an address is written to the AWR register. So, in order to work properly,
the firmware has to clear this bit after a next valid SETUP token is
received.
1
ERR
R/W
0
This bit is used to indicate that some errors have occurred when the
FIFO0 is accessed. This bit is set by SIE and should be cleared by
firmware.
2
OUT
R/W
0
This bit is used to indicate the OUT token (except the OUT zero length
token) has been received. The firmware clears this bit after the OUT data
has been read. Also, this bit will be cleared by SIE after the next valid
SETUP token is received.
3
IN
R
0
This bit is used to indicate the current USB receiving signal from PC host
is an IN token.
4
NAK
R
0
This bit is used to indicate the SIE is a transmitted NAK signal to the host
in response to the PC host IN or OUT token.
5
CRCF
R/W
0
Error condition failure flag include CRC, PID, no integrate token error,
CRCF will be set by hardware and the CRCF need to be cleared by
firmware.
6
EOT
R
1
Token pakcage active flag, low active.
7
NMI
R/W
0
NAK token interrupt mask flag. If this bit set, when the device sent a NAK
token to the host, an interrupt will be disabled. Otherwise if this bit is
cleared, when the device sends a NAK token to the host, it will enter the
interrupt sub-routine.
SIES (25H) Register