HT82A851R
Rev. 1.20
17
June 15, 2007
USB Interface
The HT82A851R device has 5 Endpoints (EP0~EP4). EP0 supports Control transfer. EP1 and EP4 support Interrupt
transfer. EP2 supports Isochronous out transfer. EP3 supports Isochronous in transfer.
These registers, including USC (20H), USR (21H), UCC (22H), AWR (23H), STALL (24H), SIES (25H), MISC (26H),
FIFO0 (28H), FIFO1 (29H), FIFO2 (2AH), FIFO3 (2BH), FIFO4 (2CH) are used for the USB function.
The FIFO size of each FIFO is 8 bytes (FIFO0), 8 bytes (FIFO1), 384 bytes (FIFO2), 32 bytes (FIFO3), 32 bytes
(FIFO4). The total is 464 bytes.
URD (bit7 of USC) is the USB reset signal control function definition bit.
Bit No.
Label
R/W
Reset
Functions
0
SUSP
R
0
Read only, USB suspend indication. When this bit is set to 1 (set by
SIE), it indicates that the USB bus has entered the suspend mode. The
USBinterruptisalsotriggeredwhenthisbitchangesfromlowtohigh.
1
RMWK
R/W
0
USB remote wake-up command. It is set by MCU to force the USB host
to leave the suspend mode.
2
URST
R/W
0
USB reset indication. This bit is set/cleared by the USB SIE. This bit is
used to detect a USB reset event on the USB bus. When this bit is set to
1 , this indicates that a USB reset has occurred and that a USB
interrupt will be initialized.
3
RESUME
R
0
USB resume indication. When the USB leaves the suspend mode, this
bit is set to 1 (set by SIE). When the RESUME is set by SIE, an
interrupt will be generated to wake-up the MCU. In order to detect the
suspendstate,theMCUshouldsetUSBCKENandclearSUSP2(inthe
UCC register) to enable the SIE detect function. RESUME will be
cleared when the SUSP goes to 0 . When the MCU is detecting the
SUSP, the condition of RESUME (causes the MCU to wake-up) should
be noted and taken into consideration.
4
V33C
R/W
0
0/1: Turn-off/on V33O output
5~6
Undefined bit, read as 0 .
7
URD
R/W
1
USB reset signal control function definition
1: USB reset signal will reset MCU
0: USB reset signal cannot reset MCU
USC (20H) Register