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參數(shù)資料
| 型號： | HT82A851R |
| 廠商： | Holtek Semiconductor Inc. |
| 英文描述： | USB Audio MCU |
| 中文描述： | USB音頻控制器 |
| 文件頁數(shù)： | 23/43頁 |
| 文件大小： | 304K |
| 代理商： | HT82A851R |
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HT82A851R
Rev. 1.20
23
June 15, 2007
SPI
The serial interface function is similar to the Motorola SPI, where four basic signals are included. These are the SDI
(Serial Data Input), SDO (Serial Data Output), SCK (serial clock) and SCS (slave select pin).
Label
Functions
D7
D6
D5
D4
D3
D2
D1
D0
SBCR
Serial Bus
Control Register
CKS
M1
M0
SBEN
MLS
CSEN
WCOL
TRF
Default
0
1
1
0
0
0
0
0
SBDR
Serial Bus
Data Register
D7
D6
D5
D4
D3
D2
D1
D0
Default
U
U
U
U
U
U
U
U
Note: U unchanged
Two registers, SBCR and SBDR, are provided for serial interface control, status and data storage.
SBCR: Serial bus control register
Bit7 (CKS): clock source selection: f
SIO
= f
SYS
/2, select as 0; f
SIO
= f
SYS
, select as 1
Bit6 (M1), Bit5 (M0): master/slave mode and baud rate selection
M1, M0=
00: Master mode, baud rate = f
SIO
01: Master mode, baud rate = f
SIO
/4
10: Master mode, baud rate = f
SIO
/16
11: Slave mode
Bit4 (SBEN): Serial bus enable/disable (1/0)
Enable: (SCS dependent on CSEN bit)
Disable
enable: SCK, SDI, SDO, SCS =0 (SCK= 0 ) and wait to write data to SBDR (TXRX buffer)
Master mode: write data to SBDR (TXRX buffer)
Master mode: when data has been transferred
set TRF
Slave mode: when a SCK (and SCS dependent on CSEN) is received, data in the TXRX buffer is shifted-out and
data on SDI is shifted-in.
start transmission/reception automatically
Disable: SCK (SCK), SDI, SDO, SCS floating and related pins are IO ports.
Label
Functions
SBEN=1
PC4~PC7 are SPI function pins (pin SCS will go low if CSEN=1).
SBEN=0
PC4~PC7 are general purpose I/O Port pins - default
Note: 1. If SBEN= 1 , the pull-high resistors on PC4~PC7 will be disabled. When this happens external pull-high
resistors should be added to the SPI related pins if necessary (EX: pin SCS).
2. If CSEN= 0 , the SCS pin will enter a floating state.
Bit3 (MLS): MSB or LSB (1/0) shift first control bit
Bit2 (CSEN): serial bus selection signal enable/disable (SCS), when CSEN=0, SCS is floating
Bit1 (WCOL): this bit is set to 1 if data is written to SBDR (TXRX buffer) when the data is transferring
writing will be ignored if data is written to SBDR (TXRX buffer) when the data is transferring
WCOL will be set by hardware and cleared by software.
Bit 0 (TRF): data transferred or data received
Note: data reception is still operational when the MCU enters the Power-down mode
used to generate an interrupt
+ (
)
8 (
(
1
0 (
3
3 (
0
1 (
(
8
) (
+
+ (
)
8 (
(
1
0 (
3
3 (
0
1 (
(
8
) (
+
SPI Timing
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