參數(shù)資料
型號(hào): HT82A851R
廠商: Holtek Semiconductor Inc.
英文描述: USB Audio MCU
中文描述: USB音頻控制器
文件頁(yè)數(shù): 20/43頁(yè)
文件大?。?/td> 304K
代理商: HT82A851R
HT82A851R
Rev. 1.20
20
June 15, 2007
TheMISCregistercombinescommandandstatustocontrolthedesiredendpointFIFOactionandtoshowthestatusof
the desired endpoint FIFO. MISC will be cleared by a USB reset signal.
Bit No.
Label
R/W
Power-on
Functions
0
REQUEST
R/W
0
After setting the status of the desired one, FIFO can be requested
by setting this bit high . After finishing, this bit must be set low.
1
TX
R/W
0
To represent the direction and transition end MCU access. When
set to logic 1, the MCU desires to write data to the FIFO. After
finishing, this bit must be set to logic 0 before terminating request to
represent transition end. For an MCU read operation, this bit must
be set to logic 0 and set to logic 1 after finishing.
2
CLEAR
R/W
0
MCUrequeststocleartheFIFO,eveniftheFIFOisnotready.After
clearing the FIFO, the USB interface will send force_tx_err to tell
the Host that data under-run if the Host wants to read data.
3
ISO_IN_EN
R/W
0
Enables the isochronous in pipe interrupt.
4
ISO_OUT_EN
R/W
0
Enables the isochronous out pipe interrupt.
5
SETCMD
R/W
0
To show that the data in the FIFO is a setup command. This bit will
remain in this state until the next one enters the FIFO.
6
READY
R
0
To show that the desired FIFO is ready
7
LEN0
R
0
To show that the host sent a 0-sized packet to the MCU. This bit
must be cleared by a read action to the corresponding FIFO.
MISC (26H) Register
Bit No.
Label
R/W
Power-on
Functions
0
DATATG*
R/W
0
DATA token toggle bit
1
SETIO1**
R/W
1
Set endpoint1 input or output pipe (1/0), default input pipe(1)
2
SETIO2**
R/W
0
Set endpoint2 input or output pipe (1/0), default output pipe(0)
3
SETIO3**
R/W
1
Set endpoint3 input or output pipe (1/0), default input pipe(1)
4
SETIO4**
R/W
1
Set endpoint4 input or output pipe (1/0), default input pipe(1)
5~7
Undefined bit, read as 0
Note: *USB definition: when the host sends a set Configuration , the Data pipe should send the DATA0 (about the
Data toggle) first. So, when the Device receives a set configuration setup command, the user needs to toggle
this bit as the following data will send a Data0 first.
**It is only required to set the data pipe as an input pile or output pile. The purpose of this function is to avoid the
host sending a abnormal IN or OUT token and disabling the endpoint.
SETIO (27H) Register, USB Endpoint 1 ~ Endpoint 4 Set IN/OUT Pipe Register
The speaker output volume and speaker mute/un-mute are controlled by the USB Speaker Volume Control register.
The range of the volume is set from 6 dB to -32 dB by software.
Speaker mute control:
MUTE=0: Mute Speaker output
MUTE=1: Normal
Bit No.
Label
R/W
Power-on
Functions
0~6
USVC0~
USVC6
R/W
0
Volume control Bit0~Bit6
7
MUTE
R/W
0
Mute control, low active.
USB Speaker Volume Control (1CH) Register
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