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參數(shù)資料
| 型號： | HSP50210 |
| 廠商： | HARRIS SEMICONDUCTOR |
| 元件分類： | 通信及網(wǎng)絡(luò) |
| 英文描述： | Digital Costas Loop(數(shù)字Costas鎖相環(huán)) |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, PQCC84 |
| 文件頁數(shù)： | 43/49頁 |
| 文件大?。?/td> | 340K |
| 代理商： | HSP50210 |
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3-43
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TABLE 42. OUTPUT SELECTOR CONFIGURATION CONTROL REGISTER
DESTINATION ADDRESS = 28
BIT POSITION
FUNCTION
DESCRIPTION
31-8
Not Used
No programming required.
7-4
Reserved
Set to zero for proper operation.
3-0
Output Select
These bits select which input signals are routed to the 20 output pins AOUT9-0 and BOUT9-0. The signal
selections are listed below in Tables 42A and 42B.
Definition of Signal Bus Names:
Data Signal Busses:
ISOFT(2:0)
This bus is the I channel soft decision slicer output data, expressed in the data format set
by CW26 bit 7, with one sign bit (ISOFT2) and two soft decision bits.
QSOFT(2:0) This bus is the Q channel soft decision slicer output data, expressed in the data format set
by CW26 bit 7, with one sign bit (QSOFT2) and two soft decision bits.
IEND(7:1)
This bus is the 7 MSB’s of I end symbol sample into the soft decision slicer, in 2’s comple-
ment format. (MSB = Iend7).
QEND(7:1)
This bus is the 7 MSB’s of Q end symbol sample into the soft decision slicer, in 2’s comple-
ment format. (MSB = Qend7).
Status Signal Parameter Busses:
AGC(7:1) . . . . . This bus is the 7 MSB’s of the AGC Accumulator Register. (MSB = AGC7).
MAG (7:0) . . . . This bus is the 8-bit magnitude output of the Cartesian to Polar converter, in unsigned
binary format. (MSB = MAG7).
PHASE (7:0) . . This bus is the 8-bit phase output of the Cartesian to Polar converter, in unsigned binary
format. (MSB = PHASE7).
FE(7:1) . . . . . . This bus is the seven MSB’s of the Frequency Error Detector Output Register, in 2’s
complement format. (MSB = FE7).
GE (7:1) . . . . . This bus is the seven MSB’s of the Gain Error (AGC) Accumulator Register, in 2’s com-
plement format. (MSB = GE7).
TE (7:1) . . . . . This bus is the seven MSB’s of the Bit Phase Error Detector Output Register, in 2’s com-
plement format. (MSB = TE7).
CARPE (7:1) . . This bus is the seven MSB’s of the Carrier Phase Error Detector Output Register, in 2’s
complement format. (MSB = PE7).
LKACC(6:0) . . .ThisbusisthesevenLSB’softhePhaseErrorAccumulatorRegisterintheLockDetector,
in unsigned offset binary format. (MSB = LKACC6) If accumulation bits 14-17 = 1, then
bits 7-13 are output as LKACC(6.0). These outputs are zero otherwise.
LKCNT(6:0) . . This bus is the seven LSB’s of the Integration Counter in the Lock Detector, in one’s
complement format. (MSB = LKCNT6) If bits 7-9 of the accumulator are zero, then bits
0-6 are output as LKCNT(6-0). These outputs are zero otherwise.
NCOCOS(9:0) . This bus is the 10-bit two’s complement output of the DCL NCO, in 2’s complement for-
mat. (MSB = NCOCOS7).
Applications for the Various Output Signals:
ISOFT(2:0) and QSOFT(2:0)
These signals provide a simple interface to a FEC decoder. As the most likely to be used output bus, these
signals are included in all but one of the programmable multiplexer output configurations.
IEND(7:1) and QEND(7:1)
These signals are useful when input to a D/A converter and displayed on an oscilloscope in the X-Y plot.
This will yield the constellation signal display with which analog modem designers are familiar.
STATUS(6:0)
These signals can be used in fault detection for use in BIT/BITE applications and are useful during sys-
tem debug
.
AGC(7:1)
This signal is useful in monitoring the AGC operation, signal detection and antenna tracking applications.
Other single bit signals are provided for direct use in external AGC.
MAG(7:0) and PHASE(7:0)
These signals are useful in signal detection applications, where presence of a signal is represented by a
particular signal magnitude or phase.
HSP50210
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PDF描述 |
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| HSP50214VC | Programmable Downconverter |
| HSP50214VI | Programmable Downconverter |
| HSP50214 | Programmable Downconverter |
| HSP50215VC | Digital UpConverter |
| HSP50215VI | Digital UpConverter |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HSP50210JC-52 | 功能描述:上下轉(zhuǎn)換器 COSTAS DEMODULATOR,84 PLCC,52MHZ,COMM RoHS:否 制造商:Texas Instruments 產(chǎn)品:Down Converters 射頻:52 MHz to 78 MHz 中頻:300 MHz LO頻率: 功率增益: P1dB: 工作電源電壓:1.8 V, 3.3 V 工作電源電流:120 mA 最大功率耗散:1 W 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PQFP-128 |
| HSP50210JC-52Z | 功能描述:上下轉(zhuǎn)換器 COSTAS DEMODULATOR 84 PLCC 52MHZ COM RoHS:否 制造商:Texas Instruments 產(chǎn)品:Down Converters 射頻:52 MHz to 78 MHz 中頻:300 MHz LO頻率: 功率增益: P1dB: 工作電源電壓:1.8 V, 3.3 V 工作電源電流:120 mA 最大功率耗散:1 W 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PQFP-128 |
| HSP50210JI-52 | 功能描述:上下轉(zhuǎn)換器 COSTAS DEMODULATOR,84 PLCC,52MHZ,IND RoHS:否 制造商:Texas Instruments 產(chǎn)品:Down Converters 射頻:52 MHz to 78 MHz 中頻:300 MHz LO頻率: 功率增益: P1dB: 工作電源電壓:1.8 V, 3.3 V 工作電源電流:120 mA 最大功率耗散:1 W 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PQFP-128 |
| HSP50210JI-52Z | 功能描述:上下轉(zhuǎn)換器 COSTAS DEMODULATOR 84 PLCC 52MHZ IND RoHS:否 制造商:Texas Instruments 產(chǎn)品:Down Converters 射頻:52 MHz to 78 MHz 中頻:300 MHz LO頻率: 功率增益: P1dB: 工作電源電壓:1.8 V, 3.3 V 工作電源電流:120 mA 最大功率耗散:1 W 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PQFP-128 |
| HSP50214 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Programmable Downconverter |
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