參數(shù)資料
型號： HSP50210
廠商： HARRIS SEMICONDUCTOR
元件分類： 通信及網(wǎng)絡(luò)
英文描述： Digital Costas Loop(數(shù)字Costas鎖相環(huán))
中文描述： SPECIALTY TELECOM CIRCUIT, PQCC84
文件頁數(shù)： 10/49頁
文件大小： 340K
代理商： HSP50210
3-10
The AGC Loop is configured by the Power Detect Threshold
and AGC Loop Parameters Control Registers (see Tables 15
and 16). Seven programmable parameters must be set to
configure the AGC Loop and its status outputs. Two
parameters, the Power Threshold and the AGC Threshold
are associated with the Error Detector and are represented
in 8-bit fractional unsigned binary format: 2
0
.2
-1
2
-2
2
-3
2
-4
2
-
5
2
-6
2
-7.
. While the format provides a range from 0 - 1.9961
for the thresholds, the Cartesian to Polar Converter scales
the I and Q input magnitudes by 0.81. Thus, if a full scale
(
±
1) complex (I and Q) input signal is presented to the
converter, the output will be
√
(0.81)
2
+ (0.81)
2
= 1.1455. The
AGC Threshold parameter value is the desired magnitude of
the signal as it enters the Soft Decision Slicer. It is the
parameter that will determine the error signal in the AGC
loop. The Power Threshold, on the other hand, determines
only the power threshold at which the THRESH signal is
asserted. If the signal magnitude exceeds the threshold,
then the THRESH is asserted. This may be used for signal
detection, power detection or external AGC around the A/D
converter. The AGC Threshold parameter is set in the AGC
Loop Parameters Control Register, bits 16-23 (see Table 16).
The Power Threshold parameter is set in the Power Detect
Threshold Control Register, bits 0-7 (see Table 15). Note
that these two threshold parameters are not required to be
set to identical or even related values, since they perform
independent functions
The Enable AGC parameter sets the AGC Error Detector
output to zero if asserted and to normal error detection
output when not asserted. This control bit is set in the AGC
Loop Parameter Control Register, bit 31 (see Table 16). This
bit is used to disable the AGC loop.
The remaining AGC parameters determine the AGC loop
characteristics: gain tracking, tracking rate and tracking limits.
The AGC Loop gain is set via two parameters: AGC Loop
Gain Exponent and AGC Loop Gain Mantissa. In general, the
higher the loop gain, the faster signal level acquisition and
tracking, but this must be tempered by the specific signal
characteristics of the application and the remaining
programmable loop parameters. For the HSP50210, the AGC
Loop Gain provides for a variable attenuation of the input to
the loop filter. The AGC gain mantissa is a 4-bit value which
provides error signal scaling from 0.000 to 0.9375, with a
resolution of 0.0625. Table 2 details the discrete set of
decimal values possible for the AGC Loop Gain mantissa. The
exponent provides a shift factor scaling from 2
-7
to 2
-14
.
Table 3 details the discrete set of decimal values possible for
the AGC Loop Gain Exponent. When combined, the exponent
and mantissa provide a loop gain defined as:
where M is a binary number with a range from 0 to 15 and E
is a 3-bit binary value from 0 to 7. M and E are the
parameters set in the AGC Loop Parameters Control
Register, bits 24-30 (see Table 16). The composite range of
the AGC loop Gain is 0.0000 to [0.9375][2-7]. This will scale
the AGC error signal to a range of 0.000 to
(1.1455)(0.9375)(2-7) = 1.07297(2-7).
TABLE 2. AGC LOOP GAIN BINARY MANTISSA TO DECIMAL
SCALED MANTISSA MAPPING
BINARY
CODE
(MMMM)
DECIMAL
SCALED
MANTISSA
BINARY
CODE
(MMMM)
DECIMAL
SCALED
MANTISSA
0000
0.0000
1000
0.5000
0001
0.0625
1001
0.5625
0010
0.1250
1010
0.6250
0011
0.1875
1011
0.6875
0100
0.2500
1100
0.7500
0101
0.3125
1101
0.8125
0110
0.3750
1110
0.8750
0111
0.4375
1111
0.9375
TABLE 3. AGC LOOP BINARY EXPONENT TO SCALED
DECIMAL EXPONENT MAPPING
BINARY CODE
(EEE)
DECIMAL/ HEX
EXPONENT
DECIMAL SCALED
EXPONENT
000
0
2
-7
001
1
2
-8
010
2
2
-9
011
3
2
-10
100
4
2
-11
101
5
2
-12
110
6
2
-13
111
7
2
-14
AGC Loop Gain: G
AGC
M
(
)
2
4
(
–
)
[
]
2
(
[
7
E
+
(
)
–
)
]
=
(EQ. 7)
HSP50210
相關(guān)PDF資料
PDF描述
HSP50214VC Programmable Downconverter
HSP50214VI Programmable Downconverter
HSP50214 Programmable Downconverter
HSP50215VC Digital UpConverter
HSP50215VI Digital UpConverter
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
HSP50210JC-52 功能描述:上下轉(zhuǎn)換器 COSTAS DEMODULATOR,84 PLCC,52MHZ,COMM RoHS:否 制造商:Texas Instruments 產(chǎn)品:Down Converters 射頻:52 MHz to 78 MHz 中頻:300 MHz LO頻率: 功率增益: P1dB: 工作電源電壓:1.8 V, 3.3 V 工作電源電流:120 mA 最大功率耗散:1 W 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PQFP-128
HSP50210JC-52Z 功能描述:上下轉(zhuǎn)換器 COSTAS DEMODULATOR 84 PLCC 52MHZ COM RoHS:否 制造商:Texas Instruments 產(chǎn)品:Down Converters 射頻:52 MHz to 78 MHz 中頻:300 MHz LO頻率: 功率增益: P1dB: 工作電源電壓:1.8 V, 3.3 V 工作電源電流:120 mA 最大功率耗散:1 W 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PQFP-128
HSP50210JI-52 功能描述:上下轉(zhuǎn)換器 COSTAS DEMODULATOR,84 PLCC,52MHZ,IND RoHS:否 制造商:Texas Instruments 產(chǎn)品:Down Converters 射頻:52 MHz to 78 MHz 中頻:300 MHz LO頻率: 功率增益: P1dB: 工作電源電壓:1.8 V, 3.3 V 工作電源電流:120 mA 最大功率耗散:1 W 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PQFP-128
HSP50210JI-52Z 功能描述:上下轉(zhuǎn)換器 COSTAS DEMODULATOR 84 PLCC 52MHZ IND RoHS:否 制造商:Texas Instruments 產(chǎn)品:Down Converters 射頻:52 MHz to 78 MHz 中頻:300 MHz LO頻率: 功率增益: P1dB: 工作電源電壓:1.8 V, 3.3 V 工作電源電流:120 mA 最大功率耗散:1 W 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PQFP-128
HSP50214 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Programmable Downconverter
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報(bào)價(jià)

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*