參數(shù)資料
型號(hào): HFA3860BIV
廠商: HARRIS SEMICONDUCTOR
元件分類: 無(wú)繩電話/電話
英文描述: 3.3V 288-mc CPLD
中文描述: TELECOM, CELLULAR, BASEBAND CIRCUIT, PQFP48
文件頁(yè)數(shù): 39/40頁(yè)
文件大?。?/td> 272K
代理商: HFA3860BIV
4-39
FIGURE 22. TX PORT SIGNAL TIMING
NOTE:
RXD, MD_RDY is output two MCLK after RXCLK rising to provide hold time. RSSI Output on TEST (5:0).
FIGURE 23. RX PORT SIGNAL TIMING
NOTE: t
D2
will occur arbitrarily from rising or falling edge of MCLK if CR2, Bit 7 is set to a 1, otherwise it follows diagram.
FIGURE 24. MISCELLANEOUS SIGNAL TIMING
t
TLP
t
PEH
t
RI
t
TCD
t
TCD
t
RC
t
D1
t
TDS
t
TDH
TX_PE
I
OUT
, Q
OUT
TXRDY
TX_CLK
TXD
t
ME
t
RLP
t
RD3
t
REH
t
RD2
RX_PE
I
IN
, Q
IN
MD_RDY
RX_CLK
RXD
CCA, RSSI
t
RCP
t
RCD
t
RCD
t
RDD
t
RD1
t
RDS
t
CCA
RESET
MCLK
t
CP
t
RPW
t
D2
MCLK
TEST 0-7, CCA, ANTSEL, TEST_CK
HFA3860B
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