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參數(shù)資料
| 型號： | HFA3860BIV |
| 廠商： | HARRIS SEMICONDUCTOR |
| 元件分類： | 無繩電話/電話 |
| 英文描述： | 3.3V 288-mc CPLD |
| 中文描述： | TELECOM, CELLULAR, BASEBAND CIRCUIT, PQFP48 |
| 文件頁數(shù)： | 25/40頁 |
| 文件大小： | 272K |
| 代理商： | HFA3860BIV |
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4-25
Tracking
Chip tracking is performed on the de-rotated signal samples
from the complex multiplier. These are alternately routed into
two streams. The END chip samples are the same as those
used for the correlators. The MID chip samples should lie on
the chip transitions when the tracking is perfect. A chip phase
error is generated if the END sign bits bracketing the MID
samples are different. The sign of the error is determined by
the sign of the END sample after the MID sample.
Tracking is only measured when there is a chip transition.
Note that this tracking is dependent on a positive SNR in the
chip rate bandwidth.
The symbol clock is generated by selecting one 44 MHz
clock pulse out of every 32 pulses of this sample clock.
Chip tracking adjusts the sampling in 1/8th chip increments
by selecting which edge of the 44 MHz clock to use and
which pulse. Timing adjustments can be made every 32
symbols as needed.
Carrier tracking is performed in a four phase Costas loop. The
initial conditions are copied into the loop from the carrier loop
in the low rate section. The END samples from above are
used for the phase detection. The phase error for the 11Mbps
case is derived from Isign*Q-Qsign*I whereas in binary mode,
it is simply Isign*Q. This forms the error term that is integrated
in the lead/lag filter for the NCO, closing the loop.
Demodulator Performance
This section indicates the typical performance measures for
a radio design. The performance data below should be used
as a guide. In general, the actual performance depends on
the application, interference environment, RF/IF
implementation and radio component selection.
Overall Eb/N0 Versus BER Performance
The PRISM chip set has been designed to be robust and
energy efficient in packet mode communications. The
demodulator uses coherent processing for data
demodulation. The figures below show the performance of
the baseband processor when used in conjunction with the
HFA3724 IF limiter and the PRISM recommended IF filters.
Off the shelf test equipment are used for the RF processing.
The curves should be used as a guide to assess
performance in a complete implementation.
Factors for carrier phase noise, multipath, and other
degradations will need to be considered on an
implementation by implementation basis in order to predict
the overall performance of each individual system.
Figure 16 shows the curves for theoretical DBPSK/DQPSK
demodulation with coherent demodulation and descrambling
as well as the PRISM performance measured for DBPSK and
DQPSK. The theoretical performance for DBPSK and DQPSK
are the same as shown on the diagram. Figure 17 shows the
theoretical and actual performance of the MBOK/CCK modes.
The losses in both figures include RF and IF radio losses;
they do not reflect the HFA3860B losses alone. The
HFA3860B baseband processing losses from theoretical are,
by themselves, a small percentage of the overall loss.
The PRISM demodulator performs with an implementation
loss of less than 3dB from theoretical in a AWGN environment
with low phase noise local oscillators. For the 1 and 2Mbps
modes, the observed errors occurred in groups of 4 and 6
errors. This is because of the error extension properties of
differential decoding and descrambling. For the 5.5 and
11Mbps modes, the errors occur in symbols of 4 or 8 bits
each and are further extended by the descrambling. Therefore
the error patterns are less well defined.
5
6
7
8
9
10
11
12
13
14
EB/N0
1.E
-02
B
1.E
-03
1.E
-04
1.E
-05
1.E
-06
1.E
-07
FIGURE 16. BER vs EB/N0 PERFORMANCE FOR PSK MODES
BER 2.0
BER 1.0
THY 1.2
FIGURE 17. BER vs EB/N0 PERFORMANCE FOR MBOK/CCK
MODES
14
13
12
11
10
9
8
7
6
5
B
1.E-03
1.E-04
1.E-05
1.E-06
1.E-07
Eb/N0
THY 5.5
THY 11
BER 11
BER 5.5
HFA3860B
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HFA3860BIV96 | nullDirect Sequence Spread Spectrum Baseband Processor |
| HFA3861BIN | Direct Sequence Spread Spectrum Baseband Processor |
| HFA3861BIN96 | Direct Sequence Spread Spectrum Baseband Processor |
| HFA3925IA | null2.4GHz - 2.5GHz 250mW Power Amplifier |
| HFA3925IA96 | null2.4GHz - 2.5GHz 250mW Power Amplifier |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HFA3860BIV WAF | 制造商:Harris Corporation 功能描述: |
| HFA3860BIV96 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| HFA3860IV | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Harris Corporation 功能描述: |
| HFA3860IV WAF | 制造商:Harris Corporation 功能描述: |
| HFA3860IV96 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:11 Mbps Direct Sequence Spread Spectrum Baseband Processor |
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