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參數(shù)資料
| 型號： | HFA3860BIV |
| 廠商： | HARRIS SEMICONDUCTOR |
| 元件分類： | 無繩電話/電話 |
| 英文描述： | 3.3V 288-mc CPLD |
| 中文描述： | TELECOM, CELLULAR, BASEBAND CIRCUIT, PQFP48 |
| 文件頁數(shù)： | 37/40頁 |
| 文件大小： | 272K |
| 代理商： | HFA3860BIV |
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4-37
TXD Modulation Extension
t
ME
t
RLP
t
RCP
t
RCD
t
RDD
t
RD1
t
RD1
t
RDS
t
REH
t
REH
t
REH
t
REH
t
RD2
t
RD3
2
-
μ
s (Notes 11, 15)
RX_PE Inactive Width
70
-
ns (Notes 11, 16)
RX_CLK Period (11Mbps Mode)
77
-
ns
RX_CLK Width Hi or Low (11Mbps Mode)
31
-
ns
RX_CLK to RXD
25
60
ns
MD_RDY to 1st RX_CLK
940
-
ns (Notes 11, 19)
RXD to 1st RX_CLK
940
-
ns
Setup RXD to RX_CLK
31
-
ns
RX_CLK to RX_PE Inactive (1Mbps)
0
925
ns (Notes 11, 17)
RX_CLK to RX_PE Inactive (2Mbps)
0
380
ns (Notes 11, 17)
RX_CLK to RX_PE Inactive (5.5Mbps)
0
140
ns (Notes 11, 17)
RX_CLK to RX_PE Inactive (11Mbps)
0
50
ns (Notes 11, 17)
RX_PE inactive to MD_RDY Inactive
5
30
ns (Note 18)
Last Chip of SFD in to MD_RDY Active
2.77
2.86
μ
s (Notes 11, 19)
μ
s (Notes 11, 20)
RX Delay
2.77
2.86
RESET Width Active
t
RPW
t
CCA
t
CCA
50
-
ns (Notes 11, 21)
RX_PE to CCA Valid
-
16
μ
s (Notes 11, 22)
μ
s (Notes 11, 22)
RX_PE to RSSI Valid
-
16
ANTSEL Lead Time
820
-
ns (Notes 11, 23)
SCLK Clock Period
t
SCP
t
SCW
t
SCS
t
SCH
t
SCD
t
SCED
t
D2
90
-
ns
SCLK Width Hi or Low
20
-
ns
Setup to SCLK + Edge (SD, SDI, R/W, CS)
30
-
ns
Hold Time from SCLK + Edge (SD, SDI, R/W, CS)
0
-
ns
SD Out Delay from SCLK + Edge
-
30
ns
SD Out Enable/Disable from R/W or CS
-
15
ns (Note 11)
TEST 0-7, CCA, ANTSEL, TEST_CK from MCLK
-
40
ns
NOTES:
10. AC tests performed with C
L
= 40pF, I
OL
= 2mA, and I
OH
= -1mA. Input reference level all inputs 1.5V. Test V
IH
= V
CC
, V
IL
= 0V; V
OH
= V
OL
= V
CC
/2.
11. Not tested, but characterized at initial design and at major process/design or guaranteed by simulations.
12. Measured from V
IL
to V
IH
.
13. I
OUT
/Q
OUT
are modulated before first valid chip of preamble is output to provide ramp up time for RF/IF circuits.
14. TX_PE must be inactive before going active to generate a new packet.
15. I
OUT
/Q
OUT
are modulated after last chip of valid data to provide ramp down time for RF/IF circuits.
16. RX_PE must be inactive at least 3 MCLKs before going active to start a new CCA or acquisition.
17. RX_PE active to inactive delay to prevent next RX_CLK.
18. Assumes RX_PE inactive after last RX_CLK.
19. MD_RDY programmed to go active after SFD detect. (Measured from I
IN
, Q
IN
).
20. MD_RDY programmed to go active at MPDU start. Measured from first chip of first MPDU symbol at I
IN
, Q
IN
to MD_RDY active.
21. Minimum time to insure Reset. RESET must be followed by an RX_PE pulse to insure proper operation. This pulse should not be used for first
receive or acquisition.
22. CCA and RSSI are measured once during the first 16
μ
s interval following RX_PE going active. RX_PE must be pulsed to initiate a new
measurement. RSSI may be read via serial port or from Test Bus.
23. ANTSEL is switched in diversity mode before acquisition cycle to compensate for delays in IF circuits. The correlators will be 100X(820ns -
TdRFns)/990ns% full of new data at the beginning of bit sync accumulation. TdRFns is the settling time of the RF circuits after ANTSEL switches.
24. Delay from TXCLK to inactive edge of TXPE to prevent next TXCLK. Because TXPE asynchronously stops TXCLK, TXPE going inactive within
40ns of TXCLK will cause TXCLK minimum hi time to be less than 40ns.
Electrical Specifications
V
CC
= 3.0V to 3.3V
±
10%, T
A
= -40
o
C to 85
o
C (Note 10)
(Continued)
PARAMETER
SYMBOL
MCLK = 44MHz
UNITS
MIN
MAX
HFA3860B
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| HFA3860BIV96 | nullDirect Sequence Spread Spectrum Baseband Processor |
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| HFA3861BIN96 | Direct Sequence Spread Spectrum Baseband Processor |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HFA3860BIV WAF | 制造商:Harris Corporation 功能描述: |
| HFA3860BIV96 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| HFA3860IV | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Harris Corporation 功能描述: |
| HFA3860IV WAF | 制造商:Harris Corporation 功能描述: |
| HFA3860IV96 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:11 Mbps Direct Sequence Spread Spectrum Baseband Processor |
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