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參數(shù)資料
| 型號(hào)： | HFA3860BIV |
| 廠商： | HARRIS SEMICONDUCTOR |
| 元件分類： | 無(wú)繩電話/電話 |
| 英文描述： | 3.3V 288-mc CPLD |
| 中文描述： | TELECOM, CELLULAR, BASEBAND CIRCUIT, PQFP48 |
| 文件頁(yè)數(shù)： | 33/40頁(yè) |
| 文件大小： | 272K |
| 代理商： | HFA3860BIV |
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4-33
Bits 7:0
Test Bus Address = 03h
RSSI Monitor
Test 7 = CSE Enhanced. Used in enhanced CCA dual antenna mode.
Test 6 = CSE, Carrier Sense Early (SQI CCA Only)
Test 5:0 = RSSI(5:), bit 5 is MSB, straight binary (000000 = Min, 11111 = Max)
TEST_CLK = RSSI A/D CLK, Sample RSSI(5:0) on last rising edge
Bits 7:0
Test Bus Address = 04h
SQ1 Monitor
Test 7:0 = SQ1 (7:0)
TEST_CLK = pulse after SQ is valid
Bits 7:0
Test Bus Address = 05h
SQ2 Monitor
- SQ3 output if SQ3 used for antenna diversity.
Test 7:0 = SQ2 (7:0)
TEST_CLK = pulse after SQ is valid
Bits 7:0
Test Bus Address = 06h
Correlator Lo Rate
Test 7:0 = Correlator Magnitude Lo Rate Only
TEST_CLK = Sample CLK
Bits 7:0
Test Bus Address = 07h
Freq Test Lo Rate
Test 7:0 = Freq Reg Lo Rate (18:11)
TEST_CLK = SUBSAMPLECLK (Symbol Clock)
Bits 7:0
Test Bus Address = 08h
Phase Test Lo Rate
Test 7:0 = Phase Reg Lo Rate (7:0)
TEST_CLK = SUBSAMPLECLK (Symbol Clock)
Bits 7:0
Test Bus Address = 09h
NCO Test Lo Rate
Test 7:0 = NCO Reg Lo Rate (15:8)
TEST_CLK = SUBSAMPLECLK (Symbol Clock)
Bits 7:0
Test Bus Address = 0Ah
Bit Sync Accum Lo Rate
Test 7:0 = Bit Sync Accumulator (7:3), exponent (2:0)
TEST_CLK = Last symbol indicator
Bits 7:0
Test Bus Address = 0Bh
Test PN Gen.,
Factory Test Only
Test 7:0 +TEST_CLK = Top 9 bits of PN generator used for fault tests.
Bits 7:0
Test Bus Address = 0Ch
A/D Cal Test Mode
Test 7 = A/D CAL (Full Scale)
Test 6 = ED, Energy Detect Comparator Output
Test 5 = A/D_CAL Disable
Test(4:0) = A/D_Cal(4:0)
TEST_CLK = A/D_Cal CLK
Bits 7:0
Test Bus Address = 0Dh
Correlator I High Rate,
tests the MBOK I correlator output.
Test 7:0 = Correlator I Hi Rate (8:1)
TEST_CLK = Sample CLK
Bits 7:0
Test Bus Address = 0Eh
Correlator Q High Rate,
tests the MBOK Q correlator output.
Test 7:0 = Correlator Q Hi Rate (8:1)
TEST_CLK = Sample CLK
Bits 7:0
Test Bus Address = 0Fh
Chip Error Accumulator,
Test 7:0 = Chip Error Accumulator (14:7)
TEST_CLK = 0
CONFIGURATION REGISTER 28 ADDRESS (70h) TEST BUS ADDRESS (Continued)
Supplies address for test pin outputs and Test Bus Monitor Register
HFA3860B
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PDF描述 |
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| HFA3860BIV96 | nullDirect Sequence Spread Spectrum Baseband Processor |
| HFA3861BIN | Direct Sequence Spread Spectrum Baseband Processor |
| HFA3861BIN96 | Direct Sequence Spread Spectrum Baseband Processor |
| HFA3925IA | null2.4GHz - 2.5GHz 250mW Power Amplifier |
| HFA3925IA96 | null2.4GHz - 2.5GHz 250mW Power Amplifier |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HFA3860BIV WAF | 制造商:Harris Corporation 功能描述: |
| HFA3860BIV96 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| HFA3860IV | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Harris Corporation 功能描述: |
| HFA3860IV WAF | 制造商:Harris Corporation 功能描述: |
| HFA3860IV96 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:11 Mbps Direct Sequence Spread Spectrum Baseband Processor |
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