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參數資料
| 型號： | HB52R329E2 |
| 廠商： | Hitachi,Ltd. |
| 英文描述： | 256 MB Registered SDRAM DIMM(256 MB 寄存同步DRAM DIMM) |
| 中文描述： | 注冊使用256 MB SDRAM的內存（256 MB的寄存同步的DRAM內存） |
| 文件頁數： | 24/67頁 |
| 文件大小： | 630K |
| 代理商： | HB52R329E2 |
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HB52R329E2-D
24
Column address strobe and write command [WRIT]:
This command starts a write operation. When the
burst write mode is selected, the column address and the bank select address (BA) become the burst write
start address. When the single write mode is selected, data is only written to the location specified by the
column address and the bank select address (BA).
Write with auto-precharge [WRIT A]:
This command automatically performs a precharge operation
after a burst write with a length of 1, 2, 4 or 8, or after a single write operation. When the burst length is
full-page, this command is illegal.
Row address strobe and bank activate [ACTV]:
This command activates the bank that is selected by
Bank select address (BA) and determines the row address (AX0 to AX11). When A12 and A13 are Low,
bank 0 is activated. When A12 is High and A13 is Low, bank 1 is activated. When A12 is Low and A13 is
High, bank 2 is activated. When A12 and A13 are High, bank 3 is activated.
Precharge selected bank [PRE]:
This command starts precharge operation for the bank selected by Bank
select address (BA). If A12 and A13 are Low, bank 0 is selected. If A12 is High and A13 is Low, bank 1
is selected. If A12 is Low and A13 is High, bank 2 is selected. If A12 and A13 are High, bank 3 is
selected.
Precharge all banks [PALL]:
This command starts a precharge operation for all banks.
Refresh [REF/SELF]:
This command starts the refresh operation. There are two types of refresh
operation, the one is auto-refresh, and the other is self-refresh. For details, refer to the CKE truth table
section.
Mode register set [MRS]:
The SDRAM module has a mode register that defines how it operates. The
mode register is specified by the address pins (A0 to A13) at the mode register set cycle. For details, refer
to the mode register configuration. After power on, the contents of the mode register are undefined,
execute the mode register set command to set up the mode register.
相關PDF資料 |
PDF描述 |
|---|---|
| HB52RD168DB | 128 MB Unbuffered SDRAM S.O.DIMM(128MB 未緩沖同步DRAM DIMM) |
| HB52RD328DC | 256 MB Unbuffered SDRAM S.O.DIMM(256 MB 未緩沖同步DRAM S.O.DIMM) |
| HB52RF1289E2-75B | x72 SDRAM Module |
| HB52RF1289E2 | 1 GB Registered SDRAM DIMM 128-Mword 】 72-bit, 133 MHz Memory Bus, 2-Bank Module (36 pcs of 64 M 】 4 Components) PC133 SDRAM |
| HB52RF1289E2 | 1 GB Registered SDRAM DIMM(1GB 寄存同步DRAM DIMM) |
相關代理商/技術參數 |
參數描述 |
|---|---|
| HB52R329E22-A6F | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x72 SDRAM Module |
| HB52R329E22-B6F | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x72 SDRAM Module |
| HB52R329E22-F | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:256 MB Registered SDRAM DIMM 32-Mword × 72-bit, 100 MHz Memory Bus, 2-Bank Module (36 pcs of 16 M × 4 Components) PC100 SDRAM |
| HB52R329E2-B6 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x72 SDRAM Module |
| HB52R649E1U-A6B | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:512 MB Registered SDRAM DIMM 64-Mword × 72-bit, 100 MHz Memory Bus, 1-Bank Module (18 pcs of 64 M × 4 Components) PC100 SDRAM |
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