- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄385344 > GS9090A (Gennum Corporation) GS9090A GenLINX-R III 270Mb/s Deserializer for SDI PDF資料下載
參數(shù)資料
| 型號(hào)： | GS9090A |
| 廠商： | Gennum Corporation |
| 英文描述： | GS9090A GenLINX-R III 270Mb/s Deserializer for SDI |
| 中文描述： | GS9090A GenLINX - R的第三270Mb / s的SDI解串器 |
| 文件頁數(shù)： | 45/69頁 |
| 文件大?。?/td> | 687K |
| 代理商： | GS9090A |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁當(dāng)前第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁
GS9090A Preliminary Data Sheet
Proprietary and Confidential
34714 - 0
February 2006
45 of 69
3.10 Internal FIFO Operation
The GS9090A contains an internal video line-based FIFO, which can be
programmed by the application layer to work in any of the following modes:
1. Video Mode,
2. DVB-ASI Mode,
3. Ancillary Data Extraction Mode, or
4. Bypass Mode
The FIFO can be configured to one of the four modes by using the host interface
to set the FIFO_MODE[1:0] bits of the IOPROC_DISABLE register (see
Table 3-14
in
Error Correction and Insertion on page 42
). The setting of these bits is shown in
Table 3-15
. To enable the FIFO, the application layer must also set the FIFO_EN
pin HIGH. Additionally, if the FIFO is configured for video mode or ancillary data
extraction mode, the IOPROC_EN pin must be set HIGH.
The FIFO is fully asynchronous, allowing simultaneous read and write access. It
has a depth of 2048 words, which will accommodate 1 full line of SD video for both
525 and 625 standards. The FIFO is 15 bits wide: 10 bits for video data and 5 bits
for other signals, such as H, V, F, EDH_DETECT, and ANC_DETECT.
3.10.1 Video Mode
The internal FIFO is in video mode when the application layer sets the FIFO_EN
and IOPROC_EN pins HIGH, and the FIFO_MODE[1:0] bits in the
IOPROC_DISABLE register are configured to 00b. By default, the
FIFO_MODE[1:0] bits are set to 00b by the device whenever the SMPTE_BYPASS
pin is set HIGH and the DVB_ASI pin is set LOW (i.e. the device is in SMPTE
mode); however, the application layer may program the FIFO_MODE[1:0] bits as
required.
Figure 3-6
shows the input and output signals of the FIFO when it is configured for
video mode.
Table 3-15: FIFO Configuration Bit Settings
FIFO Mode
FIFO_MODE[1:0]
Register Setting
FIFO_EN
Pin Setting
IOPROC_EN
Pin Setting
Video Mode
00b
HIGH
HIGH
DVB-ASI Mode
01b
HIGH
X
Ancillary Data Extraction Mode
10b
HIGH
HIGH
Bypass Mode
11b
X
X
NOTE: ‘X’ signifies ‘don’t care’. The pin is ignored and may be set HIGH or LOW.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| GS9090ACNE3 | GS9090A GenLINX-R III 270Mb/s Deserializer for SDI |
| GS9090 | GS9090 GenLINX-R III 270Mb/s Deserializer for SDI and DVB-ASI |
| GS9090-CNE3 | GS9090 GenLINX-R III 270Mb/s Deserializer for SDI and DVB-ASI |
| GS9092A | GS9092A GenLINX-R III 270Mb/s Serializer for SDI and DVB-ASI |
| GS9092ACNE3 | GS9092A GenLINX-R III 270Mb/s Serializer for SDI and DVB-ASI |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| GS9090A_10 | 制造商:GENNUM 制造商全稱:GENNUM 功能描述:GenLINX III 270Mb/s Deserializer |
| GS9090ACNE3 | 制造商:Semtech Corporation 功能描述:270Mb/s Deserializer 56-Pin QFN EP 制造商:Semtech Corporation 功能描述:270Mb/s Deserializer for SDI & ASI |
| GS9090B | 制造商:GENNUM 制造商全稱:GENNUM 功能描述:GenLINX III 270Mb/s Deserializer for SDI |
| GS9090B_10 | 制造商:GENNUM 制造商全稱:GENNUM 功能描述:GenLINX III 270Mb/s Deserializer for SDI |
| GS9090BCNE3 | 功能描述:RF, RFID, WIRELESS RoHS:是 類別:集成電路 (IC) >> 接口 - 串行器，解串行器 系列:* 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- 功能:解串器 數(shù)據(jù)速率:2.5Gbps 輸入類型:串行 輸出類型:并聯(lián) 輸入數(shù):- 輸出數(shù):24 電源電壓:1.8 V ~ 3.3 V 工作溫度:-40°C ~ 105°C 安裝類型:表面貼裝 封裝/外殼:64-TQFP 裸露焊盤 供應(yīng)商設(shè)備封裝:64-TQFP-EP（10x10） 包裝:管件 |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。