參數(shù)資料
型號(hào): GS4901BCNE3
廠商: Gennum Corporation
英文描述: SD Clock and Timing Generator with GENLOCK
中文描述: 統(tǒng)計(jì)時(shí)鐘和定時(shí)發(fā)生器鎖相
文件頁數(shù): 69/95頁
文件大?。?/td> 898K
代理商: GS4901BCNE3
GS4901B/GS4900B Preliminary Data Sheet
37703 - 0
April 2006
69 of 95
Genlock_Control
16h
15-7
Reserved. Set these bits to zero when writing to 16h.
16h
6
This bit is used to enable the Extended Audio Mode of
the device.
R/W
0
16h
5
Genlock_From_Host - set this bit HIGH to enable video
genlock control via the Host Interface instead of the
external GENLOCK pin (see bit 0 of this register).
Reference:
Section 3.2 on page 34
R/W
0
16h
4
F_Lock_Mask - if this bit is set HIGH, the
GS4901B/GS4900B will ignore the status of F_Lock (bit
4 of register 15h) when determining the status of
Reference_Lock (bit 5 of register 15h).
Reference:
Section 3.6.1 on page 47
R/W
0
16h
3
V_Lock_Mask - if this bit is set HIGH, the
GS4901B/GS4900B will ignore the status of V_Lock (bit
3 of register 15h) when determining the status of
Reference_Lock (bit 5 of register 15h).
Reference:
Section 3.6.1 on page 47
R/W
0
16h
2
H_Lock_Mask - if this bit is set HIGH, the
GS4901B/GS4900B will ignore the status of H_Lock (bit
2 of register 15h) when determining the status of
Reference_Lock (bit 5 of register 15h).
Reference:
Section 3.6.1 on page 47
R/W
0
16h
1
Drift_Crash - when this bit is set HIGH, the generated
video clock will drift lock to a new input reference rather
than crash lock.
Reference:
Section 3.6.1 on page 47
R/W
0
16h
0
GENLOCK - this bit may be used instead of the external
pin to Genlock the output video format to the input
reference. This bit will be ignored if bit 5 of this register
is LOW.
Reference:
Section 3.2 on page 34
R/W
0
RSVD
17h-19h
Reserved
Table 3-13: Configuration and Status Registers (Continued)
Register Name
Address
Bit
Description
R/W
Default
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