參數(shù)資料
型號: GS4901BCNE3
廠商: Gennum Corporation
英文描述: SD Clock and Timing Generator with GENLOCK
中文描述: 統(tǒng)計(jì)時(shí)鐘和定時(shí)發(fā)生器鎖相
文件頁數(shù): 6/95頁
文件大?。?/td> 898K
代理商: GS4901BCNE3
GS4901B/GS4900B Preliminary Data Sheet
37703 - 0
April 2006
6 of 95
List of Figures
GS4901B Functional Block Diagram........................................................................... 2
GS4900B Functional Block Diagram........................................................................... 3
Figure 1-1: XTAL1 and XTAL2 Reference Circuits ....................................................19
Figure 2-1: PCLK to TIMING_OUT Signal Output Timing ..........................................32
Figure 2-2: Maximum Pb-free Solder Reflow Profile (preferred) ................................33
Figure 2-3: Standard Pb Solder Reflow Profile .........................................................33
Figure 3-1: SD-HD Calculation ...................................................................................37
Figure 3-2: Output Accuracy and Modes of Operation ...............................................39
Figure 3-3: Example HSYNC, VSYNC, and FSYNC Analog Input Timing
from a Sync Separator ...............................................................................................40
Figure 3-4: Example H Blanking, V Blanking, and F Digital Input Timing
from an SDI Deserializer ............................................................................................40
Figure 3-5: 10FID Input Timing ..................................................................................41
Figure 3-6: Default 10FID Output Timing ...................................................................57
Figure 3-7: Optional 10FID Output Timing .................................................................58
Figure 3-8: AFS Output Timing ..................................................................................59
Figure 3-9: USER Programmable Output Signal .......................................................60
Figure 3-10: Audio Clock Block Diagram for HD Demux Operation ...........................62
Figure 3-11: GSPI Application Interface Connection .................................................63
Figure 3-12: Command Word Format ........................................................................64
Figure 3-13: Data Word Format .................................................................................64
Figure 3-14: GSPI Read Mode Timing .......................................................................65
Figure 3-15: GSPI Write Mode Timing .......................................................................65
Figure 3-16: In-Circuit JTAG ......................................................................................87
Figure 3-17: System JTAG .........................................................................................88
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