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參數(shù)資料
| 型號(hào)： | GS1559-CBE2 |
| 廠商： | Gennum Corporation |
| 英文描述： | GS1559 HD-LINX-TM II Multi-Rate Deserializer with Loop-Through Cable Driver |
| 中文描述： | GS1559的HD - LINX進(jìn)程，商標(biāo)第二多速率解串器與環(huán)通電纜驅(qū)動(dòng)器 |
| 文件頁數(shù)： | 39/74頁 |
| 文件大?。?/td> | 686K |
| 代理商： | GS1559-CBE2 |
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GS1559 Data Sheet
30572 - 4
July 2005
39 of 74
4.7.4 HVF Timing Signal Generation
The GS1559 extracts critical timing parameters from either the received TRS
signals (FW_EN/DIS = LOW), or from the internal flywheel-timing generator
(FW_EN/DIS = HIGH).
Horizontal blanking period (H), vertical blanking period (V), and even / odd field (F)
timing are all extracted and presented to the application layer via the H:V:F status
output pins.
The H signal timing is configurable via the H_CONFIG bit of the internal
IOPROC_DISABLE register as either active line based blanking, or TRS based
blanking, (see
Error Correction and Insertion on page 57
).
Active line based blanking is enabled when the H_CONFIG bit is set LOW. In this
mode, the H output is HIGH for the entire horizontal blanking period, including the
EAV and SAV TRS words. This is the default H timing used by the device.
When H_CONFIG is set HIGH, TRS based blanking is enabled. In this case, the H
output will be HIGH for the entire horizontal blanking period as indicated by the H
bit in the received TRS ID words.
The timing of these signals is shown in
Figure 4-3
.
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| GS1560 | 制造商:GENNUM 制造商全稱:GENNUM 功能描述:HD-LINX II Voltage Controlled Oscillator |
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