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參數(shù)資料
| 型號： | GS1559-CBE2 |
| 廠商： | Gennum Corporation |
| 英文描述： | GS1559 HD-LINX-TM II Multi-Rate Deserializer with Loop-Through Cable Driver |
| 中文描述： | GS1559的HD - LINX進程，商標第二多速率解串器與環(huán)通電纜驅(qū)動器 |
| 文件頁數(shù)： | 29/74頁 |
| 文件大?。?/td> | 686K |
| 代理商： | GS1559-CBE2 |
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GS1559 Data Sheet
30572 - 4
July 2005
29 of 74
4.4.1 Output Swing
Nominally, the voltage swing of the serial digital loop-through output is 800mV
p-p
single-ended into a 75
Ω
load. This is set externally by connecting the RSET pin to
CD_VDD through 281
Ω
.
The loop-through output swing may be decreased by increasing the value of the
RSET resistor. The relationship is approximated by the curve shown in
Figure 4-1
.
Alternatively, the serial digital output can drive 800mVp-p into a 50
Ω
load. Since
the output swing is reduced by a factor of approximately one third when the smaller
load is used, the RSET resistor must be 187
Ω
to obtain 800mVp-p.
Figure 4-1: Serial Digital Loop-Through Output Swing
4.4.2 Reclocker Bypass Control
The serial digital loop-through output may be either a buffered version of the serial
digital input signal, or a reclocked version of that signal.
When operating in slave mode, the application layer may choose the reclocked
output by setting RC_BYP to logic HIGH. If RC_BYP is set LOW, the data stream
will bypass the internal reclocker and the serial digital output will be a buffered
version of the input.
When operating in master mode, the device will assert the RC_BYP pin HIGH only
when it has successfully locked to a SMPTE or DVB-ASI input data stream, (see
Lock Detect on page 31
). In this case, the serial digital loop-through output will be
a reclocked version of the input.
300
400
500
600
700
800
900
1000
250
300
350
400
450
500
550
600
650
700
750
RSET(
Ω
)
Δ
V
S
(
p
)
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| GS1560 | 制造商:GENNUM 制造商全稱:GENNUM 功能描述:HD-LINX II Voltage Controlled Oscillator |
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| GS1560A_09 | 制造商:GENNUM 制造商全稱:GENNUM 功能描述:HD-LINX II Dual-Rate Deserializer |
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