參數(shù)資料
型號: GM72V66841ET-7
廠商: HYNIX SEMICONDUCTOR INC
元件分類: DRAM
英文描述: 2,097,152 WORD x 8 BIT x 4 BANK SYNCHRONOUS DYNAMIC RAM
中文描述: 8M X 8 SYNCHRONOUS DRAM, 5.4 ns, PDSO54
封裝: 0.400 INCH, TSOP2-54
文件頁數(shù): 42/57頁
文件大?。?/td> 592K
代理商: GM72V66841ET-7
LG Semicon
GM72V66841CT/CLT
AC Characteristics
(Ta = 0 to 70C, V
CC
, V
CCQ
= 3.3 V +/- 0.3 V, V
SS
, V
SSQ
= 0 V)
(Continued)
Notes :1. AC measurement assumes
t
T
= 1ns. Reference level for timing of input signals is 1.40V.
2. Access time is measured at 1.40V. Load condition is C
L
= 50pF without termination.
3.
t
LZ
(min)defines the time at which the outputs achieves the low impedance state.
4.
t
HZ
(max)defines the time at which the outputs achieves the high impedance state.
5.
t
CES
define CKE setup time to CKE rising edge except Power down exit command.
41
Test Condition
- Input and output-timing reference levels: 1.4V
- Input waveform and output load: See following figures
20%
t
T
t
T
0.4V
2.4V
I/O
80%
OPEN
input
C
L
Symbol
Unit
Notes
Parameter
- 8
Min
Max
- 10K
Min
Max
10
-
15
-
ns
1
t
RRD
16
-
20
-
ns
1
Active (a) to Active (b)
command period
Transition time
(rise to fall)
Refresh period
t
T
1
5
1
5
ns
t
REF
-
64
-
64
ms
- 7K
Min
Max
t
RWL
Write recovery or data-in
to precharge lead time
10
-
20
-
1
5
-
64
- 7J
Min
Max
10
-
20
-
1
5
-
64
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