- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄384329 > GL9701-MXG (Genesys Logic, Inc.) PCI ExpressTM to PCI Bridge PDF資料下載
參數(shù)資料
| 型號(hào)： | GL9701-MXG |
| 廠商： | Genesys Logic, Inc. |
| 英文描述： | PCI ExpressTM to PCI Bridge |
| 中文描述： | 的PCI ExpressTM到PCI橋 |
| 文件頁(yè)數(shù)： | 43/75頁(yè) |
| 文件大?。?/td> | 1077K |
| 代理商： | GL9701-MXG |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)當(dāng)前第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)
GL9701 PCI Express
TM
to PCI Bridge
2000-2006 Genesys Logic Inc. - All rights reserved.
Page 43
19:16
RO
0b
64-bit Indicator:
These bits indicate that 64-bit addressing is not
supported for the limit.
31:20
RW
000h
Prefetchable Memory Limit:
These bits are compared with
bits[31:20] of the incoming address to determine the upper 1
MB-aligned value (inclusive) of the range. The incoming address
must be less than this value.
6.20 Offset 28h: Prefetchable Base Upper 32-bits Register
Bits
Type
Default
Description
31:0
RO
0000-0000h
Prefetchable Memory Base Upper 32bit:
These bits indicate that
full 64-bit addressing is not supported.
6.21 Offset 2ch: Prefetchable Limit Upper 32-bits Register
Bits
Type
Default
Description
31:0
RO
0000-0000h
Prefetchable Memory Limit Upper 32bit:
These bits indicate
that full 64-bit addressing is not supported.
6.22 Offset 30h: IO Base and Limit Upper 16-bits Register
Bits
Type
Default
Description
15:0
RO
0000h
I/O Base Upper 16 Bits:
32-bit IO addressing is not supported
31:16
RO
0000h
I/O Limit Upper 16 Bits:
32-bit IO addressing is not supported
6.23 Offset 34h: Capabilities Pointer Register
Bits
Type
Default
Description
7:0
RO
70h
Capabilities Pointer:
These bits indicate that the pointer for the
first entry in the capabilities list is at 70h in the configuration
space.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| GL9711 | PCI ExpressTM PIPE x1 PHY |
| GL9711-TGGXX | PCI ExpressTM PIPE x1 PHY |
| GL9714 | PCI ExpressTM PIPE x4 PHY |
| GL9714-TGGXX | PCI ExpressTM PIPE x4 PHY |
| GL9ED2 | 2.0X5.0mm, Rectangle Type, Milky Diffusion, Dichromatic LED Lamps for Indicator |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| GL9711 | 制造商:GENESYS 制造商全稱:GENESYS 功能描述:PCI ExpressTM PIPE x1 PHY |
| GL9711-TGGXX | 制造商:GENESYS 制造商全稱:GENESYS 功能描述:PCI ExpressTM PIPE x1 PHY |
| GL9714 | 制造商:GENESYS 制造商全稱:GENESYS 功能描述:PCI ExpressTM PIPE x4 PHY |
| GL9714-TGGXX | 制造商:GENESYS 制造商全稱:GENESYS 功能描述:PCI ExpressTM PIPE x4 PHY |
| GL99 | 制造商:Gem Sound 功能描述:Rack Mount Outlet Strip, With Light |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。